A Survey of Multilevel Voltage Source Inverter Topologies, Controls and Applications

Received Feb 9, 2018 Revised Jul 31, 2018 Accepted Aug 6, 2018 Multilevel converters tremendous positive contribution in the field of power electronics and renewable energy has been the reason behind the surge in it research interest. The converter has put hope in the minds of power electronic engineers that a time will come when it will break a record by providing an efficient means of utilising the abundant renewable energy resources. In an effort to report the recent advances in renewable energy conversion technology, this paper presents a review of multilevel voltage source converters that are widely being used in engineering applications. It reports the technological advancements in converter topologies of Flying Capacitor (FC), Neutral Point (NPC) /Diode Clamped, and Cascaded HBridge (CHB) with their respective advantages and disadvantages. Recent customized/hybrid topologies of the three-phase multilevel inverter with reduced component count and switching combination are reported. The paper also reviewed different modulation techniques such as the multilevel converter carrier base PWM, Space Vector Modulation techniques (SVM), and Selective Harmonic Elimination method (SHE-PWM). Finally, various multilevel converters areas of application were highlighted. This review will expose the reader to the latest developments made in the multi-level converters topology, modulation techniques, and applications. Keyword:


INTRODUCTION
Over dependency on fossil fuels as the major source of energy poses a serious threat to the continued existence of life on our beloved planet "Earth". The number of greenhouse gases emitted into the atmosphere on daily bases as the result of energy generation and industrial utilisation is quite alarming. Fossils exploration and processing results in severe environmental pollution (both land and water), which entails affects the natural structures and habitat living in them. As the result of the problem above, researchers have focused their attention and resources towards finding an alternative and sustainable means of energy generation that has zero or minimum environmental de-gradational effects compared to the conventional fossil fuels [1]. To this effect, many power electronic converters were designed and had already been placed at various distributed generation (DG) and grid-connected networks [2].
Multi-level converters have become an exciting research area for many power electronic engineers and scientist; this could be mainly due to its high power handling capability making it suitable for both medium and high power industrial applications. Figure 1 below depicts a graphical representation of the significant areas of application. A number of research articles were published on the industrial applications of multi-level converters especially the ones found in high power ac drives systems like electric trains, power  Shanono) 1187 generation stations, crane conveyors and refineries [3]. In addition to its high power handling capability, it also produces a better output voltage waveform closer to sinusoidal, with low output harmonic distortion and reduced switching stress dv/dt on the power electronic switching devices [4]. These features have remarkably put it on top of its conventional counterpart.

Figure 1. Multi-level inverter converter applications
Multi-level converters can be categorised into three main topologies namely Flying Capacitors (FC), Neutral Point (NPC) /Diode Clamped and Cascaded H-bridge (CHB) [5]. They are invented to increase the inverter output power and at the same time provide solutions to the inability of the ordinary conventional inverters to withstand high switching frequency, high voltage and current stress which cumulatively lead to reduced efficiency and induces substantial electromagnetic-interference (EMI) in the system [6].
The topology composed of some number of low voltage devices, arranged in such a way to share the voltage/current stress across them, which is achieved by employing proper switching sequence on the switches. An essential advantage of multi-level configuration is that without increasing the switching frequency or output power, the harmonics in the converter output are reduced. The word multilevel converter starts from three-level upward and as the level increases the total harmonic distortion (THD) decreases. Voltage problems, clamping requirements, cost and other constraints limit the number of achievable output voltage steps. Switching strategy plays a significant role in the performance of an inverter because it has a direct link to the harmonic content of the inverter output voltage. That is why power electronic scientist has suggested innovative techniques to minimise harmonic distortions in the converter output. Numerous modulation methods such as Sinusoidal Pulse Width Modulation Techniques (SPWM), Space Vector Modulation Technique (SVM) and Optimized Harmonic Stepped Waveform Technique (OHSW) are embraced [7].
The SPWM and SVM techniques were designed to operate at a high switching frequency, which has the merit of reduced output filter size and de-merit of increased device switching stress and heat loss. OHSW technique operates the power devices at a low frequency, exerting less switching stress on the switches; therefore dissipate less amount of heat. The reduced switching frequency results in increased output harmonic distortion, which warrants the need for a large filter size. To realise a smaller size filter using this technique, the dominant low-frequency harmonics needs to be shifted further to a high frequency using step modulation and multiple level inverters, these results in increased inverter price and circuit complexity. To address this problem, a different approach was introduced, were by notches are superimposed on the output waveform at a predetermined angle; this pushed the low order dominant harmonics to a higher frequency so that they can be easily eliminated using a small sized filter [8]. This new approach is called Selective Harmonic Elimination Method or pre-calculated modulation technique. Patel et al. [9] were the first to propose it. This is a non-carrier based technique because it only requires some pre-calculated angles that are stored in a lookup table (memory) [10]. These angles are found by solving the transcendental non-linear equation found through Fourier series expansion of the output voltage equation. As previously stated, quite a number of multi-level converter topologies have been mentioned in several kinds of literature [11]. In this paper, the three most promising topologies that serve as the base for hybrid configurations are reviewed in detail. The high voltage capability, fewer harmonics in the output waveform and higher efficiency are some of the advantages that made multilevel voltage source noteworthy [12]. A common drawback to the multilevel inverters is its complexity and cost due to the need for more number of power switches [13]. Figure 2 summarizes the various classifications of high power converters.

Converter terminologies
Here, some commonly used terminologies and assessment parameters in the field of multi-level power converters are highlighted. a. The reduced device counts multi-level inverter (RDC-MLI): Refers to the topology in which for a given number of phase level the number of controlled switching devices are reduced. b. Total voltage blocking capability: Refers to the maximum amount of reverse voltage the converter switches are capable of blocking [14]. c. Symmetric and asymmetric source configuration: The term symmetric in an MLI refers to when the voltages of the input dc level are equal; otherwise, it is termed asymmetric [15], [16]. d. Even power distribution: Also known as charge balance control or equal load sharing [17]. When each input source of a multilevel conversion provides equal power to the load, such power distribution within the sources is said to be 'even'. In some literature, it is called charge balance control or equal load sharing. e. Level-Generation and Polarity-Generation: MLI generates stepped output waveform by controlling the dc input source in such a way that it adds up and subtracts to produce a level waveform. The generated output composed of both positive and negative polarities, allowing the realisation of an alternating signal with positive and negative half cycle. The MLI converter switches in the polarity generation circuit have to be able to withstand the operating voltage. f. Fundamental frequency Switching: It is a frequently mentioned converter terminology. It is known that switching frequency, current and blocking voltage are proportional to the switching losses in a converter [18]. To minimise the losses, the MLI is operated at low frequency, which is called fundamental frequency while reserving the output quality.

Converter assessment parameters
The performance measurement of any multilevel inverter topology is based on how well it performs on the application in which it is meant for. The performance assessment of reduced device count multi-level converters with regards to other topologies can be based on the following parameters: a) Blocking voltage of the converter

Conventional Topologies
This section discusses the three conventional topologies within which most of the current hybrids are drawn from.

Diode Clamped Topology
Diode clamp multi-level converter topology is an advancement of a three-level Neutral point inverter invented in the early 80's [19]. Later in the 1990s, the number of steps was increased up to six levels [20]. Clamping diodes are used in this type of converter to reduce the device voltage stress. An m d level diode clamped converter needs (2m d − 2) switching device, needs (m d − 1) input voltage source and (m d − 1) (m d − 2) number of diodes with a voltage Vdc across the diodes and switch [21].
From the table, it can be seen that switch (S1, S5), (S2, S6), (S3, S7) and (S4, S8) are operated complementary and in a sequential switching pattern. Each of the switching devices should at least be able to block 4 voltage level. The clamping diodes blocks unequal reverse voltage. For instance, when the converter output voltage is at 1 = 0, all the lower arm switches are said to be at On state, in this case D3 has to block 3 4 , D2 blocks 2 , and D1 will block 4 . In a situation where a converter is to be designed with the same rated diodes, then for a Dn-1 positioned diode, n-1 series connected diodes will be required to block ( − 1) reverse voltage [4]. Below is the list of advantages and disadvantages of diode clamped converter topology [22].
Advantages: 1. It requires single isolated Dc supply; this warrants the possibility of having a back-to-back connection. 2. The Dc bank capacitors can be charged simultaneously. 3. It provides a better efficiency when operated at the fundamental switching frequency.
Disadvantages: 1. The number of clamping diodes increases with increase in voltage level. This brought about the additional cost and circuit complexity, especially in higher steps converters. 2. Unequal switching stress across the switching device, i.e. inner switches conduct for a short time compared with the inner switches. 3. Not suitable for redundancy.

Flying Capacitor Topology
Flying capacitor (FC) is another converter topology that was invented in the early 90's by Maynard et al. [23]. It circuit connection is similar to that of a diode clamp, only that capacitors were placed instead of diodes. An m level diode clamped converter needs (2 − 2) switching device and needs ( − 1) number of capacitors with a voltage Vdc across the `capacitors and switch [21]. Figure 4 shows its 3-phase circuit connection. The topology comprises of a ladder-like arranged dc link capacitors, each having a different voltage rating. The voltage difference between two adjacent capacitors determines the amplitude value of each step. To generate M-level phase voltage steps at Vxo, M-1 capacitors need to be connected serially at the dc-bus. The line voltage Vxy, in this case, will be (2M -1) levels. One of the benefits of flying capacitor over diode clamp is its redundancy property. It can generate a particular output voltage using multiple switching sequences. For an M-level flying capacitor converter designed with equal rated capacitors, the number of phase capacitors can be found using the expression ((M-1)(M-2))/2 [19]. The merits and demerits of the multi-level flying capacitor are stated as follows [19]. It requires single isolated dc supply voltage source.
Disadvantages: 1. The number of capacitors is determined by the inverter output level. This makes the circuit looks bulky and difficult to package. 2. A complex control mechanism that requires feedback is involved. This is to maintain voltage across the capacitors. 3. The converter has poor efficiency due to high switching losses.

Cascaded H-bridge Topology
A cascaded H-bridge is a promising converter topology made up of series a connected H-bridge inverter module. Figure 5 shows a single phase 5-level circuit configuration of the inverter. The circuit comprises of four full bridge modules with each having its independent dc supply. The nine-level voltage steps are generated by adding up the individual output voltages generated by each module. By employing a systematic switching function on the switches, each of the H-bridge cells can synthesise three different voltage levels, positive (+E), zero (0) and negative (-E) [3]. The sequence of phase voltage steps is expressed in a unique and distinctive pattern from the earlier mentioned topologies. In this case, it is express as N= 2Pdc+1, where Pdc stands for the number of independent Dc source.  Table 2.  Out of the three mentioned topologies in this paper, cascaded H-bridge topology uses the least number of power electronic components. The advantages and disadvantages of this topology are summarized as follows [3].
There is an automatic voltage sharing across the switches in a module due to the usage of the independent voltage source. Therefore, reduces restriction in the switching sequence.

2.
The converter produces more output voltage levels, providing a smooth and steady voltage change across the load, resulting in less THD for a particular operating frequency. 3.
Its modular nature makes its production, maintenance and redundancy integration much easier.

4.
Higher voltage level can be achieved by seriesconnecting more H-bridges.
The need for separate independent dc supply by each of the H-bridge modules. Increases the device cost and size.

HYBRID CONVERTER TOPOLOGIES WITH REDUCED DEVICE COUNT
This section reports three phase-modified topologies with reduced device count. Some of this topologies are hybrids or a slightly modified existing configuration.

Three-phase Multi-level DC link inverter (MLDCL)
This is an inverter circuit proposed by Rao et al. [24], it associated gate drive circuitry was reduced as it utilizes fewer switches in contrast to the 36 switches in the conventional three-phase cascaded inverter topology. For m number of voltage level, MLDCL requires m+3 active switches per phase, which is half the number of switches and clamping diode required in diode-clamped topology and also half the voltage capacitor and clamping capacitors needed in flying capacitor topology. Figure 6 below shows the circuitry of the proposed hybrid MLDCL converter. Sub-harmonic and modified space vector pulse width modulation are the control techniques used in the proposed topology. Table 3 shows the proposed topology single phase switching states and the respective generated voltage. Table 3. Switching States for a single phase seven level MLDCL inverter

Three-phase Reduced Switch Multi-level Inverter (RSMLI) Topology
This topology produces a seven-level output voltage that is almost sinusoidal, thereby reducing the converter lower order harmonics. The converter uses three H-bridge modules with one module per phase and 3 additional connected switches that allows the possibility of achieving the desired seven level waveform. There are a total of 21 switches and 9 dc sources with three each per phase. In order to determine the switching angles for generating a fundamental output voltage, it uses fundamental switching scheme. Below is the circuit of a 3-phase 21 switch MLI [25]. The proposed topology has three operating modes, namely; powering mode, freewheeling mode and regenerating mode. For the powering mode, the load current and voltage polarities are the same. In the freewheeling operating mode, one of the main switches is off and passage of the load current is due to load inductance, whereas in regenerating mode the stored energy in the load inductance is feedback to the source, the load current has to be positive during the negative half cycle and negative for positive half cycle [25]. Table 4 shows the per phase switching states of the power electronic switches and the corresponding generated output voltage. The same switching combination applie to the remaining two phase. Table 4. Switching states per phase for seven level Inverter V 0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10

Reverse Voltage Multilevel Inverter Topology (RVMLIT)
Najafi and Yatin [26] proposed a new MLIT that has dual operational functionalities. The first part utilizes high-frequency switches for the generation of level states, and the second part employs low frequency for the generation of the polarity of the output voltage. Therefore, these two high and low frequencies produce the required output voltage. To generate a seven-level output voltage, two different topologies are integrated per phase, which requires 10 switches in a phase. The upper six switches generate the required non-polarized output waveform levels while the lower 4 switches in the full bridge circuits do generates the polarity. Duplicating the middle stage increases the output voltage level. As seen from the circuitry, to generate a particularly desired polarity, the output voltage is the input to the full bridge converter with the converter output fed into the primary of a transformer whose secondary is arranged in the delta and to the three-phase system. The circuit diagram is shown in Figure 8.

Three-phase Asymmetrical Cascaded Multilevel Inverter Topology (ACMLIT)
The converter is called asymmetrical cascaded MLIT due to its unequal magnitude of the input DC sources. This MLI topology can be integrated with renewable energy sources as it requires less number of DC sources [27]. Figure 9 shows the circuit diagram of the asymmetrical cascaded topology. The zero and E-level output voltage level are generated using two switches and a single DC source. In order not to short-circuit the DC source, the switches S1 and S2 are operated in a complementary manner. The two DC sources and four switches of each phase of the proposed topology forms a module structure. Three basic unit can be added based on the required output voltage levels. It generates the PWM signals through comparison of the reference sine wave with the carrier wave thereby generating pulse signals A1, A2, A3.

Three-phase Symmetrical Multilevel Inverter Topology (SMLIT)
This is another modular 3-phase symmetrical topology, which produces 3-phase output voltage level using 12 switches [28]. Each phase comprises a battery and two switches in series and parallels respectively. Both switches connected to the battery are operated in complementary to each other. Increasing the number of phase elements (components) increases the number of the voltage step. Where Mlevel = number of output levels, New =number of power switches, Nps=number of power electronic switches, Ncell=number of cells Thongprasri [29] proposed a three-phase cascaded hybrid multilevel inverter comprising of a 3phase inverter in series with an H-bridge module. Each module has a separate independent dc source. He uses multi-carrier based modulation sub-harmonic PWM (MC-SH PWM) on FPGA board to generate the control signals. Figure 11a shows the 3-phase topology of the proposed multilevel inverter.

Figure 11a. 5-level three-phase cascaded hybrid multilevel inverter
The proposed topology was tested using 3 different types of the load; 18W fluorescent lamp-ballast, RL, and 1HP 3-phase induction motor; without filtering. The per-phase circuit configuration is given in Figure 11b.

MULTILEVEL CONVERTERS MODULATION TECHNIQUES (MT)
Due to the rapid advancements in the field of power electronics and the tremendous breakthrough and confidence poised by multi-level converter technology, researchers are exploring every aspect of it, with the aim of improving its overall performance. With the subsequent invention and modification of topologies, the need for new and compatible modulation techniques to suit the new topologies can never be overemphasized. This is the reason why modulation technique is trending in the field of power electronics 1197 [3]. The ever-rising complication of power control systems as the result of additional auxiliaries, the need to reduce switching losses and stress on individual power switches, have facilitated significantly in the advancement so far recorded in the field of modulation techniques [30]. Several techniques have been developed with each having its merits, de-merits and preferential area of application. Figure 12 shows the various classifications of multilevel converter modulation techniques. From the figure, it can be seen that the techniques are categorized into two broader groups based on their domain of operation. These are the state space vector techniques and the voltage level based approach [31]. The former operates based on the voltage space vectors while the latter operates on voltage level over a period of time.

Carrier Based Pulse Width Modulation (CB-PWM)
The early PWM techniques were transformed and upgraded to be applied to the current multi-level topologies. The new technique unlike the conventional counterparts produces the control signal using multiple carrier signals, hence called multi-level PWM [32]. FC and CHB topologies can both be configured in modular form, hence giving the leverage for each module to be modulated independently using bipolar and unipolar sinusoidal carrier PWM, this amount to equal power distribution in the module cells. An N cell of FC and CHB will require (180°)/N and (360°)/N carrier phase shift respectively to generates a low harmonic distorted multi-level voltage waveform [33]. This technique is denoted as Multi-level Phase Shift Sinusoidal Pulse Width Modulation (MPSSPWM). Its major advantage is its ability to suppress the harmonics at the inputs of CHB's converters and also it can provide a balanced dc voltage in FC converter topologies. A new different approach called Level Shift Pulse width modulation (LSPWM) was introduced, it requires superimposing two carrier signals on each other. This technique is further sub-classified into 3 categories namely Alternate phase opposition (APOD), Phase opposition disposition (POD-PWM) and Phase disposition (PD) on the bases of the spatial orientation of the carrier signal [32].

Space Vector Modulation (SVM)
This technique involves comparison of converter gating signal with the vector representation of a sinusoidal reference (Vref), whereby a replica of the reference voltage is reproduced at the converter output [33]. SVM technique is currently applied on various converter topologies, resulting in the development of new algorithms that suits the existing topologies, this can be seen in the various reported literature. The reported techniques are application specifics that are designed to work on a fixed converter output steps. The higher the output steps, the more complex the control algorithms and the mathematical computations. The drawback poised by the complex algorithms and rigorous computations was later addressed in the subsequent literature [34].
Franquelo et al. [35] in his article "Space vector modulation technique for multi-level converters", proposed a new algorithm that uses simple computational procedures to produce a reference value close to the state vector, hence eliminating the need for lookup tables. In addition to reducing tedious computations, it also disputes the notion that says the more the output steps, the more the computational complexity. In another literature, a new 2 dimensional modified SVM (MSVM) technique was presented in [31]. The technique is suitable for application in 3-phase balanced system where all triple harmonics have cancelled. A 1198 more sophisticated algorithm that warrants an online vector calculation was presented in [36], it is called 3 Dimensional algorithms because it is an upgraded version of the earlier discussed 2D, it has further minimised mathematical computations and eliminates the links between circuit complexity and converter output step. This technique applies to both balanced and unbalanced systems [36].

Selective Harmonic Elimination Method (SHE-PWM)
Another name given to this modulation technique is offline or pre-calculated modulation technique. It was first proposed by Patel et al. [9]. This is a non-carrier based technique because it only requires some pre-calculated angles that are stored in a lookup table (memory) [37]. These angles are generated by first finding the Fourier expansion of the voltage waveform, which happens to be a non-linear trace-dental equation as shown in equation (4).
)} for odd n 0 for even n Based on the odd quarter wave symmetry theory, the dc components and even harmonics will cancel out will be left with the fundamental and odd harmonic components [38]. The fundamental component is equated to a constant value which is determined by the selected modulation index, and the odd harmonics are equated to zero. The generated equations have no direct solution. Hence, numerical techniques which involve iterative procedures as in Newton Raphson method [39]. Mathematical resultant method, which uses the concept of polynomials, optimization techniques or Hybrid genetic algorithm, are capable of providing an approximate value of the angles [10]. SHE method has drastically reduced switching loss, which is the reason why it has been extended to high power multi-level converters [37].
Its drawback is its restrictions to open loop systems and the complexity in finding the switching angles for a higher number of steps. These limitations resulted in the invention of other low switching loss techniques with feedbacks that are suitable for higher level applications [31].

Sinusoidal PWM (SPWM)
This technique works based on the comparison of a referenced sinusoidal wave and a triangular carrier wave. The output voltage waveform is formed as a result of the gating signal been fed into the inverter switches. These gating pulses are formed when the reference wave is larger than the carrier wave as depicted in the figure below [40].

Phase Disposition (PD) PWM
This technique enhances output voltage of a multi-level converter by optimally suppressing the output harmonics. Hence, minimising the distortion level in the voltage waveform. It employs several optimisation techniques, the likes of gradient optimisation algorithms [41].

Staircase Modulation
The staircase modulation method is most suitable for elimination of device stresses and switching losses in higher voltage and power energy conversion. It does so by determining the optimal primary values

Stepped Modulation
Here, the modulating signal is a stepped waveform, divided into intervals with each interval controlled separately to minimized specific harmonics. Converters controlled using this technique has less distortion compared to the conventional PWM modulation method [40].

Comparison of Modified/Hybrid Three Phase Multilevel Inverter Topologies
With the aim of keeping the THD within the standard limit and lesser device count, researchers have proposed different control strategies. Table 5 shows the comparison of some of the hybrid/ modified threephase topologies based on modulation techniques, number of diodes and switches, Dc source and percentage of THD in the output. Note: Some of the notations used in the table are mentioned in the text, the rest stands for the following: Ns stands for the number of switches, Nd number of diodes, Nc number of balanced capacitors, Ndc stands for the number of DC inputs, Nt number of transformers, BDSI stands for Bi=derictional switched inverter, CCHB stands for conventional cascaded H-bridge, HMLIT stands for Hybrid Multilevel inverter topology, Sub-H PWM stands for Sub-harmonic Pulse width modulation, LFM stands for Low-frequency modulation, CSPWM stands for Carrier Sinusoidal PWM.

CONCLUSION
This paper presented a comprehensive survey on multilevel converters. With emphasis given to the conventional topologies, that serves as the basis of the modern hybrid topologies. Converters operational characteristic, advantages, disadvantages and major areas of applications were outlined. The paper also reviewed some recently proposed three-phase hybrid multilevel inverter topologies with reduced device count and modified switching function. The hybrid topologies appeared to have low total harmonic distortion, less number of power electronic components and an additional number of output steps compared to the conventional topologies. The paper reported the promising and widely used modulation techniques the likes of multilevel carrier base PWM, space vector modulation techniques (SVM), selective harmonic elimination method (SHE-PWM) and phase disposition (PD) modulation techniques. It is hoped that this review will serve as a source of literature to the vast amount of new researchers in the field of multilevel voltage source converters.

ACKNOWLEDGEMENTS
This work is supported by the Faculty of Electrical and Electronic Engineering, Universiti Malaysia Pahang (UMP).