Modeling and Simulation of 127 Level Optimal Multilevel Inverter with Lower Number of Switches and Minimum THD

Received Jun 4, 2018 Revised Sep 7, 2018 Accepted Sep 30, 2018 This paper proposes a new optimal high level multilevel inverter with minimum number of components. This multi level inverter (MLI) is designed with series combination of basic units which can generate positive levels at output. DC source values applied for each basic unit is different with another. An H bridge is connected across proposed MLI for generating negative levels along with positive levels at output and that inverter considered as proposed high level optimal multilevel inverter. Single unit is responsible producing 21 levels. Therefore six units are connected in cascaded form to increase number of levels as 127 at output. Decrease in the number of power switches, driver circuits, and dc voltage sources are the improvement of the proposed MLI. Sinusoidal multiple pulse width modulation (SPWM) technique is implemented to produce pulses for turning ON switches according requirement. Low total harmonic distortion at output voltage or current production is major advantage of proposed module. The validations of proposed MLI results are verified through MATLAB/SIMULINK. Keyword:


INTRODUCTION
The power semi conductor switches cannot able to connect directly to high voltage network. The high-voltage high power with stand inverters demand is increasing day by day, in order to meet high voltage high power demand multilevel inverters are have been developed. By increasing number of levels at output wave form two main advantages are obtained one is sinusoidal like wave form at output and another is reduced total harmonic distortion in the output voltage and current waveform. In addition to that, minimum switching losses, voltage stress on switches are less [1][2][3][4][5].Mainly three types of traditional multilevel inverters are exist such as (i) neutral point clamped MLIs, (ii) flying-capacitor MLIs, (iii) cascaded H bridge type MLIs [6][7][8][9]. Cascaded multilevel inverters did not use diode clamped and/or flying capacitors for achieving reliability, modularity, simple control and lower number of switches [10][11]. Hence the switching losses and overall cost of proposed inverters decreases and efficiency can be improved [12].Various types of symmetric and asymmetric cascaded multilevel inverters presented in [13]- [18]. Two algorithms are presented like symmetric and asymmetric presented in [19]. Different asymmetric cascaded multilevel inverters have been presented for increasing the number of output levels in [20].
Basically six switch inverters were frequently used in industrial applications, but this type of inverters are not appropriate for low power applications due to very high switching losses and complexity Cascaded multilevel inverters are designed with series of basic units. Each basic unit consists of dc sources and switches. These are categorized in two ways one is symmetrical type where all dc sources are equal in all basic units, and other is asymmetrical type where dc sources are different in each basic unit. The asymmetric cascaded multilevel inverters produce a more levels in output with minimum switches while compared with symmetric cascaded multilevel inverters due to the cause of the various magnitudes of dc voltage sources. Hence space and cost of an asymmetric cascaded multilevel inverter is less than that of a symmetric cascaded multilevel inverter.The proposed novel series connected high level assymetricl type optimal MLI produces less THD when compare to classical type same high level assymetrical MLI.

RESEARCH METHOD
The classical 127 level multilevel inverter is series combination of six H-bridge inverters is as shown in Figure 1.
N IGBT= 2n + 4 (8) Output level number N LEVEL= 2 n+1 -1 (10) Where, N SWITCH, , N DRIVER, , N IGBT , and N SOURCE, are the number of switches, number of switches' drivers, number of IGBTs, and number of sources respectively. Table 2 shows ON states of switches for proposed 127 level optimal multilevel inverter. Suppose in order to get output as +63 level ,all series connected switches S' i required to be turn ON ,where i=1,2,3,4,5,6…n., addition to T 1 and T 4 switches should be ON. Similarly to get -63 level output, all series connected switches S i required to turned ON where i=1, 2, 3, 4, 5, 6…n in addition to T 2 and T 3 should be ON. Thus to achieve positive level output T 1 &T 4 ON in H bridge, and for negative level output purpose T 2 and T 3 should be ON. Finally say that series switches will enhances the level number but shunt switches decrease the level number.AS the number of levels at output side increases the wave form would be more sinusoidal so that total harmonic distortion decreases.

SIMULATION RESULTS AND DISCUSSION
In classical topology 24 number of switches are used but in proposed topology 16 number of switches used only therefore switching losses can be minimized in proposed topology hence output power and efficiency can be improved. Classical MLI fundamental voltage is 605.4v which is less than proposed MLI topology of 623.1v.Proposed topology produces 127 levels at output as shown in Figure 4 and total harmonic distortion is 0.96% as shown in Figure 5 which is less than of classical 127 level MLI topology of total harmonic distrotion is 1.74% as shown in Figure 6. Thus by increasing number of levels quality sinusoidal waveform achieved with minimum THD. Table 3 shows comparison table between single phase  classical and

CONCLUSION
In this paper, a novel basic unit is proposed in proposed cascaded multilevel inverter. If all the basic units are connected in series form then a cascaded multilevel inverter is obtained which produces positive levels only. To get negative levels along with positive levels, an H-bridge is added to the proposed cascaded multilevel inverter. Thus single phase proposed 127 level optimal multilevel inverter is designed with minimum IGBT switches and 6 dc sources when compared to single phase classical 127 multilevel inverter which is designed with more IGBT switches and same dc sources. Therefore switching losses are less in proposed topology than that of classical topology. The proposed MLI topology offers more fundamental voltage and less total harmonic distortion 0.96% when compared to classical MLI topology due to the cause of optimal structure with more number of levels at output causes to produce quality sinusoidal waveform which can applicable for ac motor drives.