The enhancement of power quality for the distribution system via dynamic voltage restorer

Received Feb 20, 2020 Revised Apr 4, 2020 Accepted Apr 16, 2020 This paper represents a new configuration of the dynamic voltage restorer consists of approximate classical sliding mode differentiator (ACSMD) with the terminal sliding mode controller (TSMC) as the nonlinear sliding variable. In this study, the proposed structure of the DVR is utilized to maintain the magnitude of the load voltage at a constant value, maintain the system total harmonic distortion (THD), boost the robustness property and minimize the steady-state error. The power quality has received more interest due to the implementation of various industrial devices and critical loads at the distribution side. Nowadays, the main challenges in power quality in the system are voltage sags/swells, harmonics and voltage imbalance. Various devices are utilized to address these challenges. The dynamic voltage restorer is one of these devices. It is connected in series with the distribution system and injects a proper voltage magnitude to maintain the voltage load at the constant value. In this paper, the DVR model with the ASMF and TSMC is implemented in using MATLAB/Simulink. The proposed controller is evaluated using the standard voltage sag indices.


INTRODUCTION
Increasing the low quality of loads and sources degrades the power quality in both electrical utilities and customers. This means that the electricity supply system may have unwanted fluctuations and distortions, especially in its frequency and voltage [1,2]. Power quality has two viewpoints; from the side of the supply of electrical power with the specified standards and from the user end. It means that electric power has to be delivered to the load and equipment without any disruption. The power quality is facing a wide range of disturbances like harmonics, sag/swell, noise, interruption, voltage imbalance, and transients. In order to address these challenges, a dynamic voltage restorer (DVR) may be utilized to keep issues for the power quality such as sagging/swelling of voltages and other disturbances at a minimum value to protect appliances [3][4][5][6][7]. The DVR has been used in practice to mitigate the voltage quality issue in the power distribution system. The DVR is installed between the grid and the sensitive loads through a transformer to inject the required voltage magnitude to compensate for the voltage difference [8][9][10].
Controlling a DVR requires a sophisticated control system such as sliding mode control. In this paper, the sliding mode control is used to control the DVR in regulating the voltage in the system. The sliding mode control is a decent branch of controller dealing with nonlinear applications. Its response is quick, easy to implement, and robust towards the variation of operating parameters. In [11], quasi Z source 1589 inverter based single-phase DVR is presented. In the paper, the DVR works robustly and reduces the system total harmonic distortion (THD) at the load side. The method also minimizes the requirement of energy storage. The sliding mode control-based DVR with 12-switch VSI is reported in [12]. In this paper, the reference voltage is generated by utilizing the adaptive notch filter. Then, a sliding mode controller based for a three-phase DVR is reported in [13] to regulate the voltage at the distribution load. The authors in this paper utilize a recursive least square algorithm to generate the reference synchronization. Most of these papers utilize a linear sliding variable with a linear differentiator to obtain the error function derivative in providing a corresponding control action. The application of the linear differentiator is limited as it is sensitive toward the presence of noise the measured input signal. This paper presents a new DVR method using an approximate classical sliding mode differentiator with a nonlinear sliding variable to overcome the drawback of the linear differentiator. The nonlinear sliding variable is based on the application of the terminal sliding mode controller to maintain the magnitude of the load voltage at the constant value, improve the system THD, boost the robustness property and minimize the steady-state error of the controller output. The proposed method of DVR is applied and investigate by using MATLAB/Simulink. The structure of this paper consists of four sections. the methodology represents as an approximate sliding mode differentiator and nonlinear sliding variable as a terminal sliding mode, the DVR structure, the proposed system of the DVR, the calculation of voltage sag and the indices of voltage sag are discussed in Section 2, the results and discussion with the performance evaluation are presented in Section 3. Section 4 discusses the concluding remarks of this study.

METHODOLOGY 2.1. Approximate classical sliding mode differentiator
In this method, the chattering attitude in the sliding mode controller and observer is used to distinguish the characteristic in the measurement to provide the appropriate control action. An approximation classical sliding mode differentiator is used to differentiate this attribute, allowing the measurement of the ultimate bound of the error between the actual and estimated value. In addition, the method allows the user to control this bound by changing the estimator parameters [14,15]. The approximate classical sliding mode differentiator is utilized to estimate error signal derivatives in the proposed system to minimize the error to a lower band as follow: Where is observer sliding variable, is the error input signal, x is the observer dynamic, ̇ is the derivative of the observer dynamic, and are the sliding mode differentiator design parameters, respectively. The value of will be selected to ensure that goes to zero when > ||. Let the estimation of error become the output of the following low pass filter.
Where is a time constant, and is the output of LPF, the ACSMD be as follows;

Nonlinear sliding variable 2.2.1. Terminal sliding mode
The application of the terminal sliding mode controller is reported in [16][17][18]. In this paper, the concept of a terminal sliding variable with a nonlinear term is utilized to solve the problems of the finite time error concourse. The terminal sliding variable is defined as follow: From (5), is defined as the sliding variable and ̇ is defined as the ACSMD output. , and are the sliding variable parameters. The parameters (β, and ) must be positive odd integers [19] and [20]. Additionally, > . In order to estimate the ultimate bound on the error , where ( ) = / .
̇= {− * ( ) + } * sign( ) = − | | + * sign( ) In (6) ̇ is the derivative of the Lyapunov function, ( ) is the function of error, sign( ) is the signal function, λ is the sliding variable parameter. To estimate the ultimate bound on the error ( ), (6) is reformulated in (7) as follows: The in (7) represents a positive constant. Accordingly, the ultimate bound on the error is determined using the following equation: With a suitable selection for p and r, the ultimate bound on the error will be smaller than the linear sliding variable.

The indices of voltage sag
This section discusses the indices utilized in this paper to describe the quality and reliability of the network. These indices are utilized to represent the power system behaviour to aid the operator decisionmaking process. The Detroit Edison sag score (SS), the voltage sag lost energy index (VSLEI), and the voltage sag energy ( ) are briefly discussed as follows:

Detroit Edison sag score (SS)
The detail of this index can be obtained in [21] and [22]. The equation to calculate this index is shown in (9): , and V C indicate the phase voltages, respectively. The value of SS is preferred when it is closer to zero, which represents a better recovering voltage following the compensation.

Voltage sag lost energy index (VSLEI)
The detail of VSLEI can be referred to in [21] and [22]. This index calculates the lost energy (W) during the voltage sag occurrence. It is calculated using the following equation: is defined as the nominal voltage, V is defined as the phase voltage, and T is defined as the time during the sag in a millisecond, respectively.

Voltage sag energy ( ):
The is calculated using the equation shown as follows: where the ( ) is defined as the voltage magnitude at time , and is defined as the duration time of the sag, respectively [22]. Figure 1 shows the test system model used to evaluate the performance of the proposed method. The parameters of the test system model can be obtained in [23]. The test system model is modeled using the MATLAB/Simulink software. The proposed method discussed in Section 2 is applied to the test system model to evaluate its performance under several types of disturbances in the system. The test system model consists of two feeders with different types of load.

Three-phase short circuit
In this study, the system is subjected to a three-phase fault at = 0.05s. The fault is applied at Feeder 1 for 0.13s. Figure 2 shows the response of the system, including the DVR, with the proposed method in mitigating the disturbance in the system. Figure 2(a) shows the three-phase voltage in Feeder 1 following the fault in the system. It shows that the voltage at all three phases reduced to zero during the application of fault. Figure 2(b) shows the voltage at the adjacent feeder, Feeder 2 following this fault. The result indicates that the voltage of all three phases drops to 65% of its nominal value. The DVR senses this condition and injects the required voltage magnitude to compensate for this difference. Figure 2(c) represents the voltage compensation injected by the proposed DVR. As a result, the voltage amplitude after the compensation improved to 0.9981, 0.998, 0.9981 in Phase A, B, and C, as shown in Figure 2(d), respectively. In addition to the voltage magnitude, the THD at the load before the compensation is 13.62. Following the compensation, the THD improves to 1.44. The result implies that the proposed DVR is able to mitigate the voltage disturbance caused by a balanced three-phase fault. The proposed method is able to maintain the load voltage and reduce the THD at the adjacent feeder following a fault in the system.

Double-line-to-ground fault
In this case, a double-line-to-ground fault of Phase A and B is applied to the system at = 0.1s. The fault is applied for 0.1s. Figure 3(a) represents the load voltage at Feeder 1. The result shows that the voltage at phase A and B is reduced to zero, while the voltage at phase C is reduced slightly as compared to the nominal value. Figure 3(b) shows the load voltage measured at Feeder 2, which is the same voltage viewed by the proposed DVR. The results show that the voltage at phase A, B and C are 87.63%, 86.31%, and 93.23% as compared to the nominal voltage, respectively. Then, the proposed DVR injects the required voltage to mitigate the voltage disturbance. Figure 3(c) represents the injected voltage from the proposed DVR. Figure 3(d) shows the load voltage at Feeder 2 after the compensation. The results show that the proposed DVR is able to restore the voltage following the fault that occurred at the adjacent feeder. Consequently, the THD at Feeder 2 is also improved, being 4.61 before the compensation and improved to 0.93 following the compensation.

Single line to ground fault
This section discusses the performance of the proposed method in the event of a single-phase fault occurred in the system. This case is crucial to this study because a single-phase fault is the most common fault that occurred in practice. In this study, a single line to ground fault at phase C is considered. The fault is applied at t=0.05s and cleared at t=0.18s. Similar to other aforementioned cases, the fault is applied at Feeder 1. Figure 4 shows the results obtained from this study. Figure 4(a) represents the load voltage at Feeder 1. The result indicates that only phase C is reduced to zero when the fault occurred. Phase A and B only experienced a slight reduction in voltage during this period. Figure 4(b) shows the load voltage at Feeder 2. The figure specifies the voltage magnitude of Phase A, B, and C is 90.7%, 94.86%, 67.46% of the nominal voltage, respectively. Consequently, the proposed DVR detects and injects the required voltage shown in Figure 4(c) to compensate for these differences. As a result, the voltage is restored to its nominal value as shown in Figure 4(d). Also, it is noted that the THD at the load is improved after the compensation. The THD before and after the compensation are 6.23 and 1.18, respectively.

Voltage imbalanced
In this case, an imbalanced voltage is applied to the system at t=0.05s until t=0.185s. The disturbance is applied to Feeder 2. Figure 5 shows the result obtained for this study. Figure 5(a) illustrates the load voltage before the compensation. In this operating situation, the load voltage of phase A, B, and C are decreased to 72.69%, 52.18%, and 79.24% of the nominal voltage, respectively. Following this disturbance, the proposed DVR detects and injects the needed voltage magnitude to regulate the voltage at the load side. The injected voltage is shown in Figure 5(b). Consequently, the compensated load voltage is shown in Figure 5(c). In the figure, the load voltage of phase A, B, and C are 99.86%, 99.73%, and 99.82% of the nominal voltage, respectively. According to the IEC 61000-3-13, the imbalanced factor should not exceed 2% [24]. In this study, the imbalance factor is 11.98 before the compensation and reduced to approximately zero after the compensation. In addition, the total harmonic distortion at the load voltage is also improved; the THD is equal to 11.25 before the compensation and reduced to 1.44 following the compensation.  Table 1 summarizes the performance of the proposed work in mitigating the voltage disturbance. The performance is evaluated using the indices discussed in Section 2.3. The results tabulated in the table represents the performance of the ACSMD with TSMC method in terms of SS, VSLEI, and E . The results show that the proposed DVR improves the quality of the voltage in terms of SS, VSLEI, and E . This implies that ACSMD with TSMC is able to mitigate the system voltage in the presence of three-phase, double line to ground, and the single line to ground fault. Table 1. Voltage sag indices for ACSMD with TSMC Consequently, the performance of the proposed method is compared with the method reported in [23]. The method in [23] utilizes a linear sliding variable with a linear differentiator to compensate for the voltage disturbance in the system. Table 2 shows the comparative analysis in terms of integral time absolute error (ITAE). The detail of ITAE is obtained in [25]. Table 2 displays the performance comparison between these two methods. The results show that the proposed method outperforms the method reported in [23] in all operating situations considered in this study in terms of ITAE.

CONCLUSION
Conclusively, a novel DVR voltage compensation method based on ACSMD with TSMC, has been proposed. The method is based on a nonlinear differentiator to obtain the error function derivative in providing a corresponding control action. The method is applied to a test system model under various voltage disturbance scenarios to evaluate its performance in mitigating the voltage disturbance. The results show that the DVR based on ACSMD and TSMC can improve the voltage following a three-phase fault, a double line to ground fault, a single line fault and a voltage imbalance condition. The study has shown that the proposed method has improved the voltage, THD, SS, VSLEI, and "E" _vs of the system after the voltage compensation. Consequently, the performance of the method is compared with a linear sliding variable with a linear differentiator method. The DVR based on ACSMD and TSMC outperforms the linear sliding variable method in term of ITAE in compensating the voltage under various types of voltage disturbance occurred in the system.