Design, modelling and simulation of controlled sepic DC-DC converter-based genetic algorithm

Received Jan 10, 2020 Revised Apr 14, 2020 Accepted Jun 28, 2020 This paper discusses various aspects of a single-ended primary inductance DC-DC converter (SEPIC). The focus is on design, modelling, and simulation results of a SEPIC converter. The study analyses the principle of SEPIC operation when operated in continuous conduction mode (CCM). Additionally, the mathematical equations for the design modules are calculated as per converter requirements. State-space equations are used to formulate the state-space model of the SEPIC converter. To satisfy the bestperformance criterion of the system, the parameters for controller (Kp, Ki, Kd) should be tuned or optimized using the genetic algorithm (GA) optimization technique. Controller parameters are determined using an objective function that minimises the integral time absolute error (ITAE). Simulations performed on a closed-loop system reveal that the step response with a PID controlled based GA displayed superior performance. A closedloop system has a substantially bigger stability region compared to an openloop system. The simulation optimised performance metrics like maximum overshoot percentage (Mp), rise time (tr), and settling time (ts). MATLAB/Simulink R2018a® and m-file code are used for the system modelling, simulation, and optimization of the PID controller parameters based on the GA.


INTRODUCTION
The power shortage relative to the cumulative demand for load is considered to be a major problem in many countries where it has become impossible to generate sufficient energy using traditional means. These difficult situations have led researchers to focus on finding alternative ways to generate energy [1,2]. Power electronic converters such as DC-DC converters (sometimes called switching regulators) are primarily implemented to improve energy conversion efficiency when extracting electric power [3]. DC-DC converters are circuits which typically supply a constant output and convert DC voltage to a different voltage level. These are used for obtaining stabilized or changing DC voltage(s) by increasing, decreasing, or multiplexing from any DC source [4,5].
There are two types of DC-DC converters, isolated and non-isolated. Flyback and forward converters are variants of isolated DC-DC converters [6]. These use a high-frequency transformer to place an electrical barrier and isolate both the input and output of these converters. A significant advantage of isolated converters is that they protect sensitive loads [7]. On the other hand, non-isolated DC-DC converters have no  [8,9]. Non-isolated DC-DC converters are cost-effective and easy to design when compared to their isolated counterparts. The converters have diverse applications in electric traction, electric vehicles, distributed-DC systems like space applications, ships, and airplanes [10,11]. Solar photovoltaic and specialised electrical machine drives are other areas where the converters are useful [12,13]. Different systems have specific requirements and the DC-DC converter used for the applications should be carefully chosen to have a highefficiency system with excellent power quality [14]. This paper focuses on the single-ended primaryinductance DC-DC Converter (SEPIC). The SEPIC converter is able to reduce or raise the electrical potential (voltage) at the output and can be considered as a buck/boost converter [12]. Additionally, the SEPIC DC-DC converter is also capable of producing a regulated positive output voltage for any input voltage. This is in contrast to other converters like CUK or ZETA that provide a negative regulated output voltage [15][16][17]. The structure of the paper is specified as follows: introduction, principle of operation of the SEPIC converter, state-space modelling for the SEPIC converter, parameters and design components required for the converter, MATLAB simulations and modelling the SEPIC converter, genetic algorithm to optimise the PID parameters to control the SEPIC converter, results from the simulation, and discussion.

PRINCIPLE OF OPERATION OF SEPIC CONVERTER
The operating principle for a SEPIC DC-DC converter used in continuous conduction mode (CCM) is described in Figure 1. The diagram shows an input voltage source (V S ), a couple of inductors (L 1 and L 2 ), a coupling capacitor (C 1 ) that is connected to the inductors to ensure that a current path exists for the DC flow and to also provide insulation [14], power diode (D 1 ), output filter capacitor (C 2 ), and a switching device. Usually, the switching device is an insulated gate bipolar transistor (IGBT) labelled (S 1 ). The load resistance of the circuit (R) is also shown.
The SEPIC converter has two operating modes: one is the CCM, the other is the discontinuous conduction mode (DCM). In this paper, the first mode is considered to have two states, which can be described as follows.

SEPIC converter operating modes 2.1.1.State I (0 < t < D)
When S1 is switched ON, the current I L1 increases. Current flowing through the second inductor I L2 also increases but in the negative direction. The energy stored in the first inductor L 1 increases. Therefore, capacitor C 1 supplies energy to increase the current in I L2 . SEPIC converter operation mode with switch S 1 ON is shown in Figure 2. The corresponding equations to state I of CCM using KVL and KCL are shown in (1), (2), (3), and (4).

2.1.2.Stae I (0 < t < D)
When switch S 1 is turned off, the capacitor input current (I C1 ) equals the current through the inductor (I L1 ). Current I L2 remains in the negative direction and does not reverse its direction. Diode D 1 actively conducts. SEPIC converter operation mode with switch S 1 OFF is depicted in Figure 3. The corresponding equations to state II of CCM using KVL and KCL are shown in (5), (6), (7), and (8).

State space modelling of SEPIC DC-DC converter
The general state space equations for the SEPIC operating under state I of CCM can be given as in equations (9) and (10).
Then, the state matrix for the SEPIC operating under state I is given in (11) and (12).   (13) and (14).
Then, the state matrix for the SEPIC converter operating under state II can be given as shown in (15) and (16).
The average form of the state matrix over a switching cycle for the SEPIC converter is as given in (17) and (18).
Where A represents the system matrix, B represents the input matrix, C represents the output matrix, and D represents the duty cycle of the SEPIC converter within the range of (0-1).

Component design of SEPIC DC-DC converter
It is necessary that the selection of the main components in the converter design improve the output power efficiency without increasing cost, especially in high-volume power electronic applications. Based on the above, this section of paper focuses on choosing components and deriving their mathematical expressions when designing a SEPIC DC-DC converter to meet the requirements tabulated in 1.

2.3.1.Component design of SEPIC DC-DC converter
The principle of volt-second balance takes into account the voltage drops at diode (D 1 ), i.e. according states to the volt-second balance for a converter operating in a steady state, the average voltage during one switching cycle of the inductor must be zero [16]. Firstly, the voltage can be seen by L 1 during interval (0 < t ≤ D T ) equals to (V L1 =V s ), while, during the interval (D T < t ≤ T), it equals (V L1 =V S -V C1 -V D -V O ). Taking the average over the entire interval and making it equal to zero, equation (19) can be obtained as: Similarly, by taking the volt-second balance for L 2 . Hence, the voltage can be seen by L 2 during interval (0 < t ≤ D T ) is equal to (V L2 =V C1 ), while during the interval (D T < t ≤ T), the voltage is equal to V L2 =-V O +V D which gives (21).
By combining (20) and (22), the transfer ratio or voltage gain (G) of the SEPIC converter in terms of (D) can be obtained as shown in (23).
The value of ( ) can be greater than or less than one, depending on the value of the duty cycle (D).

2.3.2.Calculation of minimum and maximum duty cycle
Depending on the voltage gain in equation (23), the minimum duty cycle ( ) occurs when the input voltage is at a maximum value ( ) and it can be expressed as shown in (24).
However, the maximum duty cycle ( ) may occur when the input voltage is at a minimum value ( ), as given in (25).

2.3.3.Inductor L1 and L2 selection
In switch mode power supply (SMPS), the main function of the inductors is to store energy in their magnetic field and attempt to maintain a constant current, or equivalently, to limit the rate of change in current flow to the output. Selecting an inductor is necessary to the overall design of a converter. Normally, the inductance value of a converter should be set to limit the peak-to-peak ripple current flowing to the output. The inductance value that satisfied the requirements in the design of the SEPIC converter was estimated by rearranging (1), presented in the previous section, and substituting ( = ∆ , = , = 1 ), to yield (26).

Coupling capacitor C1 selection
Capacitors have several functions in SMPS design, such as energy storage, filtering, compensation, etc. Typically, SMPS stages, the capacitance stores energy as an electric field due to the voltage applied and attempts to maintain a constant input and output voltage. To calculate the optimal value of (C 1 ) in the SEPIC converter circuit shown in Figure 1 with an acceptable level of voltage ripple to satisfy the requirements and stability of the converter, the capacitance formula shown in (27) was used.

= (27)
Equation (27) can then be rewritten, as the change in voltage is proportional to the change in charge over its capacitance, which yields (28). Thus, (29) is substituted into (28) to determine the value of input capacitor (C 1 ) as shown in (30). Hence, it should be noted that (C 1 ) is charged by (I L2 = I Omax ) during the time interval (0 < t ≤ ).

Output capacitor C2 selection
Likewise, as in the coupling capacitor ( 1 ) calculation, the value of output capacitor ( 2 ) as obtained in (32) should supply the output current ( I o max ) which is loaded during the ON state.
, are the maximum and minimum duty cycles respectively , , are maximum and minimum input voltages respectively, is the output voltage in volts, and ∆ is the same peak-to-peak ripple current in amperes for both inductors 1 and 2 when the minimum input voltage ( ) and switching frequency ( ) are applied, it may be expressed as approximately (∆ =20% * ). 1 , 2 are the peak-to-peak voltage ripples in volts at capacitors 1 and 2 , respectively. The acceptable percentage value of ripple voltage used in this paper is (∆ 1 = 1% * and ∆ 2 =1% * ).

Matlab simulation of SEPIC DC-DC converter
The open loop SEPIC DC-DC converter was implemented using the MATLAB® simulation platform R2018b Simulink [18]. For the purpose of simulation, the components of the SEPIC converter and their values tabulated in the Table 1  The output to the input voltage transfer function, ( ) can be derived from the average state (17) and (18) by using the formula to convert the state-space matrix to a transfer function, shown in (33), and substituting the values of the design parameters and components to obtain (34).

Genetic algorithm (GA)
GAs are stochastic global search engines that simulate the creation of natural processes. A GA starts with an initial population of chromosomes, each of which represents a possible solution to the problem, and the reliability of the chromosomes is evaluated by a fitness function (FF) [19,20]. The GA consists of three main steps: mutation, crossover and selection [21]. GAs are used to determine the representation of the chromosomes that are created by three values corresponding to the gains or parameters of the PID controller ( , , ) that have been modified to attain a desired behavior [22]- [24]. The ( , , ) gains are real numbers, which are to be measured individually. The equation for the PID controller is shown as (35) [25]. In this study, the integral time absolute error (ITAE) is taken as the objective function, given as (36). The reciprocal of the objective function is called FF. The FF is the measurement of the chromosome's quality.
Where is the proportional gain, is the integral time, is the derivative time, e (t) is the errorcontrolling signal = 1− y(t) and y(t) is the tuned control system step response. Figure 4 shows a flowchart for GA. The parameters of the GA are listed in Table 2.  The block diagram for the GA-optimized or tuned PID controller parameters for the SEPIC DC-DC converter can be seen in Figure 5. The reference signal or set point R(s) is input as the desired voltage and is compared with the actual value of the output voltage Y(s) for the SEPIC converter. The error signal E(s) is given as the input signal to the PID controller after its parameters are tuned using GA technique. The output signal generated by the PID controller U(s) is used as the input signal to control the suitable range of duty cycle (D) in a suitable range for the SEPIC converter, and the required output voltage is then obtained [26].

RESULTS AND DISCUSSION
MATLAB® R2018b Simulink software was used to simulate the SEPIC DC-DC converter and verify its performance. Figure 6 (a) shows the step response of the open-loop transfer function for the SEPIC DC-DC converter without the PID controller. It is observed that the response matches the step response for a second-order system. However, the maximum overshoot percentage (close to 73%) is higher than that of the second-order system. Slow rise and settling times are also observed. Figure 6 (b) depicts the closed-loop step response for a GA optimised PID controller. The PID controller parameters ( , , ) are set to their optimal value using the GA technique. This technique helps minimise the objective function (ITAE) and the optimisation process depends on the code specified in the MATLAB m-file. Table 3 specifies the optimisation criteria and the performance characteristics for the step response like ( , , ). Step response for SEPIC converter with GA-PID controller