Current mode control of single phase grid tie inverter with anti-islanding

ABSTRACT


INTRODUCTION
With the advent of renewable energy sources such as solar and wind energy, there was a need to find new ways of dealing with and utilizing the generated power [1].One elegant method was to supply this power to the utility power supply grid.This eliminated to a large extent the need for energy saving devices like batteries or pumped storage or SMES etc. Power Electronics plays an important part in this idea, as it provides with the means to transform and efficiently control the power flow from the solar panels or wind generators to the power supply grid [2]- [3].
In the case of large solar plants, three phase inverters are used to convert the DC output of the photovoltaic cells to three phase voltages which are synchronized with the three phase power supply grid and feed power to them [4]- [6].In the case of wind turbines, energy is generated as AC due to the rotating generators which may be converted into an intermediate DC which is once again fed to the grid by inverters [7]- [10].
Three phase grid tie inverters are controlled using control concepts similar to vector control used to control induction motors.Here "-" to "d-q" or "abc" transformations are used to deal with the dynamics of the system [11].Single phase grid tie inverters are used in smaller solar plants such as roof top installations on domestic sites.This calls for low cost solutions without compromising on the power quality [12].
There is one problem associated with grid tie operation which is "islanding".Normally at the point at which the inverter is connected to the grid, there may be some parallel loads or even other inverters, in which case if the grid fails and is disconnected by breakers, the grid tie inverter continues to supply the loads and 242 islands albeit at improper magnitudes and phase or frequency.This could result in damage to installations and maintenance personnel.Hence there is a need for an "anti-islanding" mechanism [13]- [16].
Traditionally, single phase grid tie inverters are voltage source inverters which have SPWM and a PLL for synchronization with the grid.This approach satisfies the steady state performance, but when the grid supply fails, the anti-islanding schemes behave erratically.What is desired is the steady state power to be supplied to the grid at a required power factor and when the grid fails, the inverter to be shut down and not feed the parallel loads and form islands [17]- [18].
In this paper CMC is suggested instead of the voltage mode of operation of the traditional single phase grid inverter [19]- [20].CMC may be used to operate the inverter at unity power factor with the current reference drawn from the grid voltage itself thus requiring no PLL [21].This also suggests that the antiislanding may be almost automatic.First it must be confirmed if the current THD supplied to the grid is within limits during normal operation.In this paper the parallel load consists of a 1 KW resistive UPF load.
The first method employed is current hysteresis control, also known as tolerance band current control.This is easily done with a MOSFET H-bridge connected through an inductor to the grid supply [22].Current through the inductor may be sensed using a hall-effect current sensor.It was seen that with a proper hysteresis or tolerance band, a sinusoidal current waveform with a frequency of 50 Hz is generated which is injected to the grid through the inductor.The hysteresis component is seen as a saw tooth like waveform riding on the fundamental, which has to be adjusted so that the THD is less than 5%.The switching frequency varies and depends on the tolerance band.Another non-linearity is the dead time between the upper and lower switches of the H-bridge which could be 1-2 microseconds [23]- [25].
When the grid supply fails in the case of the current hysteresis control the current reference also drops to zero, but the inverter maintains a tolerance band around the zero current level and pumps this to the parallel loads resulting in a low voltage high frequency voltage at the inverter AC side [26]- [28].This can be detected by an under-voltage relay and can be used for anti-islanding detection and protection.
Another method tried was constant frequency CMC or also known as Peak current control.Here also the grid voltage is used to derive the current reference signal.However, the control method adopted is different from the case of the current hysteresis method.The switches of the H-bridge are turned on at constant frequency, they are maintained on till the current peak rises to the reference value at which point they are switched off and the current drops.
The third method tried was ACMC, here a control voltage is used to vary the duty ratio (PWM) of the switches by comparing with a triangular waveform at switching frequency higher than the fundamental at 50 Hz.The control voltage is derived from a PI control fed with the difference of the average output inductor current and the current reference generated from the grid voltage.
The overall conFigureuration of the system under study is as in Figure .1, the H-bridge consists of IGBTs or MOSFETs, which are unidirectional switches with anti-parallel diodes integrated into them.The grid voltage is also sensed and used in the CMC circuit.No PLL is shown as, unity power factor operation is used with the current reference being derived from the grid voltage waveform, scaled to the required peak current.

ANTI-ISLANDING
Anti-islanding methods can be classified into two categories, active and passive methods.There is what is known as a non-detection zone or NDZ, where the anti-islanding method fails to operate.On the other hand the inverter may be tripped by fluctuations in the grid or parallel loads, even when there is no need for anti-islanding.In passive methods measurements of voltage, current, phase, impedance, frequency and THD are used to detect islanding and circumvent it.In active methods disturbances are added to the inverter output which are detected at the time of islanding.Total elimination of the NDZ is possible using active methods, however they may cause instability in the system.Using current mode in the grid tie inverter seems to suggest that passive techniques can be used in conjunction with them to achieve robust anti-islanding methods.

Current hysteresis control
CHC is simulated using MATLAB/Simulink.The control circuit is shown in Figure 2. G1, G2 and G3, G4 are the gate signals to the diagonally opposite pairs of the IGBTs or MOSFETS of the single phase bridge inverter in the power circuit.The Input DC voltage is 400 V, the grid voltage is 230 V, 50 Hz.The grid voltage is by itself used to shape the current reference waveform.This ensures unity power factor operation, with no PLL.Currents of 5 A to 10 A, were used to simulate the system.Inductor values from 10mH to 200 mH were used to experiment with.When hysteresis current of +/-200 mA was used with a 50mH inductor, a current output of THD less than 5% was obtained.Figure 3 shows the inductor current using CHC for the reference current of 5 A. Solving this for an inductance of 100 mH, and a hysteresis of ±200 mA, gives t1 and t2, the total period being t1+t2, the reciprocal being the switching frequency during the peak of the current reference.1 = 533.3, 2 = 55.2  which gives a switching frequency of 1.7 KHz.If similar equations were written for the half way point when the grid voltage is 162.5 V, a frequency of 4.1 KHz is obtained.(Though more approximate).
When the circuit breaker is opened, simulating loss of grid voltage, the current reference becomes zero.However, the hysteresis current controller continues to pump a ±200 mA as there is a path for the flow of current from the DC voltage of 400 V, through the switches, inductor and into the parallel load.So, there is a voltage across the parallel load due to the hysteresis band of current of ±200 mA, albeit at a high frequency say 10 KHz, compared to the normal 50 Hz.This behaviour may be used to shut down the inverter by halting the gate signals to the switches in the single phase bridge.A very reliable anti-islanding method may be developedusing this phenomenon.A simple under-voltage relay may be calibrated to establish anti-islanding protection.Figure 5 shows the voltage across the parallel load using CHC during grid failure.

Constant Frequency Current Mode Control
The control circuit of CFC mode control, also known as peak CMC is shown below in Figure .6.The following details are used in the simulation.The current reference is derived from the grid voltage scaled to the peak current required.So, this results in unity power factor operation and needs no PLL.The inductor current "I L " may be sensed by a hall-effect current sensor.The input DC voltage Vdc is 400 V.The grid voltage is 230 V, 50 Hz.A constant switching frequency of 10 KHz is used to produce pulses.A switch pair is turned on when the high frequency clock pulse goes to the "set" (S) input of the SR flip-flop.When the current rises and its peak equal and just exceeds the current reference, the comparator produces a "reset" (R) pulse to the flip-flop which turns of the switches.The current decays till the next "set" pulse from the clock upon which the whole cycle repeats.G1 and G2 are controlled during the positive cycle of the grid voltage and G3, G4 are controlled during the negative cycle of the grid voltage.Slope compensation is added to the current reference to prevent sub-harmonic oscillations.A resettable integrator is used to generate slope compensation.
Figure 2 shows the inductor current in CFC mode control.A current THD lesser than 5 % is achieved when the inductor is chosen to be 50 mH.So, the method may be used legitimately.When the circuit breaker is opened, the grid voltage is removed and the current reference becomes zero.However, there is a path for inductor current to flow through the parallel load.Some low current high frequency oscillations are observed during this period which is shown in Figure 8, possibly due to the slope compensation circuitry.The voltage across the parallel load is shown in Figure 9 by considering an impedance of 50 ohm in CFC mode control, when the grid is disconnected at 117 ms. Figure 11 shows the inductor current using ACMC A switching frequency of 10 KHz was used.In the simulation a proportional gain of 10 and an integral gain of 2 seemed to work well.The low pass filter used to sense the inductor current was a first order filter with a cut-off of frequency of 1 KHz.A 50 mH inductor gives a current waveform with THD lesser than 5%.Figure 12 shows an inductor current in average current control mode with 10 A reference before and after the grid is shut down at 117ms.As in the other methods, when the grid voltage fails, low voltage, high frequency oscillations are induced across the parallel load which are quite distinct from the normal grid voltage.This is like an undervoltage situation and can be discriminated as a fault situation quite rapidly.
Figure 12.Inductor current in average current control mode control falls at 117ms when grid is shut down

IMPLEMENTATION
The power circuit can be implemented with four MOSFETs or IGBTs, and their gate drive circuits.The inductor may be an iron cored type.Currents and voltage sensing can be done using hall-effect sensors which provide excellent isolation of the control circuit from the power circuit which is live.Gate drives should preferably have opto-isolation.The control circuits are built from analog devices such as opamps, comparator, transistors and diodes.Some digital circuits such as SR flip-flops, and other logic gates are also required.In current hysteresis control, the hysteresis may be provided by a Schmitt trigger using an Opamp.Slope compensation in constant frequency current mode or peak current mode can be implemented using Opamps.In ACMC, the PI controller is built using Opamps with resistive-capacitive elements for compensation.ACMC in particular is conducive to an embedded solution using a DSP or microcontroller.

CONCLUSION
CMC techniques can be used effectively in grid tie inverters and provide effective anti-islanding features.CMC of grid tie inverter operates at unity power factor without PLL, grid voltage is used to shape current reference waveforms.This paper presents results of three control techniques used in current mode grid tie inverter.The Input DC voltage is 400 V, the grid voltage is 230 V, 50 Hz for all the three current control techniques used.All the three methods can be operated so as to result in current THD less than 5%.CMC results show low current high frequency oscillations when the grid voltage is turned off.ACMC is the most intuitive of the three methods discussed.When the grid voltage fails, low voltage, high frequency oscillations are induced across the parallel load which are quite distinct from the normal grid voltage.This is like an undervoltage situation and can be discriminated as a fault situation quite rapidly.Paper also explains the passive techniques of anti-islanding method during grid failure.This can be used to build low cost single phase grid tie inverters for solar, PV applications at homes and commercial sites.

Figure 1 .
Figure 1.Overall configaration of the single phase grid tie inverter with CMC to be studied

Figure 4 .
Figure 4. Current ripple in CHC Figure 5. CHC, grid failure at 117 ms, voltage across parallel load

Figure 10 .
Figure 10.Control circuit of the ACMC Figure 11.Detailed view of 5A peak inductor current using ACMC