The new approach minimizes harmonics in a single-phase three- level NPC 400 Hz converter for airplanes

Received Ju; 24, 2020 Revised Apr 27, 2021 Accepted Jul 14, 2021 This paper provides a new approach to reducing high-order harmonics in 400 Hz inverter using a three-level neutral-point clamped (NPC) converter. A voltage control loop using the harmonic compensation combined with NPC clamping diode control technology. The capacitor voltage imbalance also causes harmonics in the output voltage. For 400 Hz inverter, maintain a balanced voltage between the two input (direct current) (DC) capacitors is difficult because the pulse width modulation (PWM) modulation frequency ratio is low compared to the frequency of the output voltage. A method of determining the current flowing into the capacitor to control the voltage on the two balanced capacitors to ensure fast response reversal is also given in this paper. The combination of a high-harmonic resonator controller and a neutral-point voltage controller working together on the 400 Hz NPC inverter structure is given in this paper.


INTRODUCTION
Currently, 400 Hz ground power unit systems (GPUs) are being widely used to power aircraft. The aircraft's electrical equipment requires total harmonic distortion (THD) to be small. The reduction of harmonics caused by the inverter and nonlinear load is a problem being studied. One widely used variable structure is the unipolar inverter [1]- [7]. This structure works very simply. But the inductor-capacitor filter (LC filter) used in very large sizes [1] to ensure the small harmonics are the downside of this structure. The controller can use two loops of voltage and current [2] on the continuous domain but cannot do so on the discontinuous domain [3]. A PI current controller has been implemented on hardware in the loop [6] but has not succeeded in controlling the output voltage. A current deadbeat controller [4] is used to control the current but gives high harmonics.
Another structure that creates three levels of NPC voltage is also being widely used for the 50/60 Hz inverter [8]- [16]. This structure has the advantage of using an LC filter with a smaller value than the unipolar inverter structure [8]. A major problem in this structure is the voltage balance between the two DC capacitors because the capacitor voltage imbalance increases the output harmonics of the converter. There are ways to perform voltage balancing [9], [10]. These methods have balanced the voltage across the capacitor with a small error but the response time is too large [10], [15] for the 400 Hz frequency and the calculation is too complicated [9], [14] to cause a 400 Hz inverter system delay. One method to help keep the two DC ISSN: 2088-8694  The new approach minimizes harmonics in a single-phase … (Do Ngoc Quy) 1739 capacitors balanced is to use a single DC/DC pulse inverter to ensure that the two capacitors are always equal in [13]. However, this method is too complicated.
In recent years, the study of variable structure for 400 Hz inverters has paid more attention. As in [17] a 3 phase NPC 400 Hz inverter was used, the LC filter circuit structure and the switching process were of interest. As Mathew et al. [18] the structure of single limb of the diode clamped inverter is simulated on hardware in the loop, FPGA. However, the higher harmonic components of the output voltage have not been considered. Another multilevel inverter that is also used to generate 400 Hz is the ANPC structure, with which the voltage on the two DC capacitors will be balanced as shwon in [19] and [20]. However, this structure uses too many switching devices. This paper presents a new approach with three-level NPC single phase inverters for 400 Hz inverters. A proposed voltage balancing controller on the capacitors has a very fast response speed. An output voltage control loop using resonant controller combined with harmonic compensation of order 3 rd , 5 th , 7 th makes a small THD on the output voltage waveform.
The next section of this paper describes how to modulate three levels of output voltage. Next, the design of neutral point voltage controller is presented. Section 4 shows the output voltage controller design. Finally, the simulation results on MATLAB and the experiment results with 5kW inverter is shown on section 5. A 1.46% on THD with a small output filter is obtained in the experiment result.

STRUCTURE AND MODULATION METHOD OF NPC INVERTER
The structure of the NPC inverter is shown in the Figure 1, this structure is also shown in [13]- [15]. The NPC single-phase inverter uses four pairs of semiconductor switches and two pairs of clamping diodes along with two capacitors C 1 and C 2 to generate three levels output voltage [11]. The switching states of the semiconductor switches are shown in Table 1. The converter uses a 400 Hz high frequency transformer with integrated filter inductor combined with the output AC filter capacitor.
The NPC inverter are modulated by the space vector method. A vector of magnitude V and angular velocity ω is treated as the modulation input in Figure 2. To generate output voltage of the inverter with voltage levels {-E, -E/2,0, +E/2, E} the space vector modulation diagram is divided into 4 regions [16]. From the switching states, as shown in Table 1 and the spatial vector modulation graph Figure 2, each small voltage vector and zero voltage vector are generated from 2 to 3 switching states, respectively. The switching states in each voltage region will be selected to ensure voltage balance across the DC-link capacitor and reduce the number of switching states. The switching order in each modulation region is show in Table 2

NEUTRAL-POINT POTENTIAL CONTROL 3.1. Effects of neutral-point voltage controller
The neutral-point voltage control aims to control the voltage across the two DC capacitors equally and equal to half the input DC voltage [15]. In fact, the impedance of the two capacitors is not equal, charging and discharging time of capacitors when the system is operating is not equal. As a result, one of the two capacitors will be over-voltage, which will endanger the system when operating at high capacity. Because the exact E/2 voltage cannot be created, high-order harmonics will appear that adversely affect the output voltage quality, which will be shown in the simulation results.

Modeling control objects
The voltage on the two capacitors depends largely on the current at the neutral point. In this case, the main control object model is to find the relationship between the two capacitors voltage and current at the neutral point. Figure 3 shows the voltage across the two capacitors and direct current to the capacitor. Where R 1 and R 2 correspond to the internal resistance of the capacitor; V C1 , V C2 and I C1 , I C2 correspond to the voltage and current on each capacitor; i 0 is the load current. Application of Kirchhoff's law [21]: Figure 3. Capacitor loading model Assuming that the voltage is in region 1 as shown in Figure 2, the MO combination will perform during ton1 and generate current i 0 (t)= -i L (t). The average current passing through the neutral point in the PWM cycle is as shown in (3): Like other regions, the average value of i 0 (t) in a PWM cycle is as ashown in (4): The function n(t) denotes the amount of time i 0 current is in the opposite and opposite direction to i L current on the inductor in the T 1 period.
where t on1 is the time that i 0 (t)=i L (t), t on2 is the time that i 0 (t)=-i L (t). The function m(v ab ) is a function that shows the valve's opening and closing time in each region, specifically: From (2) and (4) shows the relationship between the two capacitors voltage and the current at the neutral point as shown in (7) and (8): in (8) shows the modeling of the object.

Design of the balances neutral-point voltage controller
G(s) is a stable transfer function without control. However, to achieve a fast response rate and eliminate static deviations, an integral has one point not added to improve quality.
To fulfill these two requirements, a control system can be designed as a zero-pole network in which a null pole will meet the first item and a zero is placed precisely on the negative part of the real axis. Its module should be larger than the plant pole one. Figure 4 (a) and Figure 4 (b) shows the root locus diagram and response of the system after the addition of a neutral point voltage controller.
For the system parameters in this paper, the controller parameters are: K=700.2 and c= 271. The essence of the control of the neutral point voltage is to control the timing of charge and discharge current for two capacitors, which is to control the variable n(t).
From (10), to avoid the case of division by zero, a limit [-1000, +1000] is used. Moreover, there is also a limit [-1, +1] for the output value of n(t). Figure 5 shows the control structure of the neutral-point voltage. In the case, the value set corresponds to the state of the voltage on the two DC capacitors are equal.  Figure 6 (a) shows the overall structure of the system. The control of the neutral point voltage shall be from the input DC voltage, the voltage on a DC capacitor and the current on the winding to calculate the switching time of each region in SVPWM modulation. The next part is designing the voltage controller. Figure 6 (b) shows the structure of the 400Hz NPC inverter with switching frequency is 16 kHz using the transformer equivalent diagram, which is converted on the secondary side. Consider L m and X m to be extremely large and can be ignored. The system was then equivalent to using an LC low-pass filter as Figure 6 (c), where L is an inductance with an internal resistance of r, C f is an AC filter capacitor, the parameters of the filter are shown in detail in Table 2. With this system, the switching frequency is 16 kHz, this is a multiple of 400 Hz. The dynamic equations of this circuit can be expressed as [4]:

Single-loop control with PR controller
Because the PWM pulse generator frequency is quite close to the 400 Hz operating frequency of the inverter, using two circuits to control the current and voltage is not reasonable in this GPU structure. Figure 8 shows a control structure using a voltage control loop. This structure uses a first-order resonant controller, along with 3 rd , 5 th , 7 th harmonic controllers connected in parallel. This control structure has the effect of eliminating static deviations compared to when using the PID controller [18], while minimizing the harmonic steps that ensure small THD. The PR resonance controller is more convenient than the PI controller in the αβ coordinate system [22]. Because while working on the αβ coordinate system need to convert the coordinate system to the frequency angle ωt, and the PR controller does not need [23]. The transfer function of the controller is as shown in (14).  is the resonant frequency at the 1 st , 3 rd , 5 th , 7 th …; is phase angle of the resonant at the frequency which can be used to compensate for the phase delay of the controlled system. G d (s) function is a late function, it represents the PWM stage in the system. In this system, the PWM stage causes 1 to 2 cycles of T S pulse delay.  Where K SPWM is a linear gain However, when the high-harmonic of the current will be fed to the output of the voltage controller, this increases the high-harmonic at output voltage. Therefore, to increase resistance to interference, an equivalent filter + is used instead of the derived transfer function, then: where, e is the error between the equivalent filter and the derived transfer function.
With the method of squaring the smallest error, the optimal values a and b are determined as shown in (18) and (19): With the frequency of the inverter is 400Hz so s = 2π.400. Therefore: As a result, the equation of the optimum noise-robust smooth derivative will be equal to: The transfer function of the feed-forward controller will be as (22):

Results with MATLAB/Simulink
The continuous model is modeled on MATLAB/Simulink with an input DC voltage of 400 V, pulse frequency of 16 kHz, LC filter parameters are shown in Table 4. To verify the response time of the neutral point voltage controller, the initial voltage on capacitor C 1 is 400 V and the initial voltage on capacitor C 2 is 0V. Figure 9 (V diff ) shows the voltage on the two DC capacitors, initially the voltage on the two DC capacitors is 400 V apart (without the controller). At 0.06 s for the neutral point voltage controller to operate, only after 10 ms the neutral point voltage is only 0.3 V apart.
For a period of up to 0.06 seconds, the voltage pattern after the NPC inverter in Figure 9 (V int ) cannot generate three levels of voltage; voltage after LC filter cannot stick to set value, orange line is set value, blue line is meet Figure 9 (V out ). Figure 10 THD of the output voltage (a) without and (b) with neutralpoint voltage controller Figure 9 shows that the neutral point voltage has a great impact on the THD of the system. When the unbalance of neutral point voltage Figure 10 (a) THD = 10.38% is much larger than that of the neutral point voltage Figure 10 (b) THD = 0.88%. Figure 11. THD of the output voltage when first-order PR controller and high-order harmonic PR controller. Figure 11 show the high harmonic elimination capability of the resonant controller when working with nonlinear loads, the harmonic results using only the first harmonic resonance controller, THD=2.   Figure 12 (a) and Figure 12  In fact, experimenting with the case where the imbalance voltage across the two DC capacitors is large as in the simulation would be very dangerous. Therefore, in this test we will use the initial voltage available on the two DC capacitors. Figure 13 shows the voltage difference on the two original DC capacitors is 60 V, when using the neutral point voltage controller, after 13 ms the voltage at the neutral point has returned to the equilibrium position. The neutral point voltage balance algorithm has had many studies and many different results. Malakondareddy et al. [24] proposed an adaptive proportional integral (API) controller with a response time of 24 ms. In [25], [26] proposed a novel virtual space vector modulation (RCMV_VSVPWM), a set of novel virtual voltage vectors are generated to balance the neutral point voltage with a response time of 30ms. Since then, the neutral point voltage balance method in this paper has a faster response time and is suitable for 400 Hz inverters. Figure 14 and Figure 15 show the output voltage of the NPC inverter and the voltage form, the output of the LC filter with a resistive load. NPC inverter structure works well with frequency 400 Hz. To test the responsiveness of the resonant controller, use a contactor to close the 3 Ω load. Initially, the system operates in no load condition, then the load is changed from no load to full load condition. The results are shown in Figure 16, the system has stabilized and reached the reference value in less than one cycle of 400 Hz.
To confirm the total harmonic distortion of the output voltage, the data of the output voltage from the oscilloscope will be transferred to the computer and processed by MATLAB software to get the THD value. Figure 17 (a) and Figure 17 (b) show the THD value in two cases, the first is working with the firstorder PR (THD =2.97%), the second is working with the high-level PR (THD =1.46%). The results show that the high-harmonic resonator controller can eliminate the 3 rd and 5 th harmonic.  Figure 17. Experimental results THD of the output voltage when using the first harmonic PR controller and high-order harmonic PR controller, (a) using the first harmonic PR controller; (b) using high-order harmonic PR controller

CONCLUSION
This paper presents a new approach to a three-level NPC clamping diode structure for 5 kVA 400 Hz inverters to minimize harmonics. A method of controlling the voltage balance on a DC capacitor with a fast response rate by changing the position of the pole and zero points and the static deviation is greatly reduced. The 3 rd , 5 th , and 7 th harmonic compensated resonance controller is applied. In order to increase response to the output voltage, a current feed-forward controller with high-order harmonic filtering is used, thereby minimizing harmonics generated to the inverter. The experimental results have proved this when the obtained THD was 1.46% at 5 kVA capacity.