A high efficiency and high speed charge of Li-Ion battery charger interface using switching-based technique in 180 nm CMOS technology

Mustapha El Alaoui, Fouad Farah, Karim El khadiri, Ahmed Tahiri, Rachid El Alami, Hassan Qjidaa Laboratory of Computer Science, Signals, Automation and Cognitivism (LISAC), Department of Physics, Faculty of Sciences Dhar El Mahraz, Sidi Mohamed Ben Abdellah University, Fez, Morocco Laboratory of Computer Science and Interdisciplinary Physics (LIPI), Normal Superior School Fez (ENSF), Sidi Mohamed Ben Abdellah University, Fez, Morocco


INTRODUCTION
The Battery is a necessary element to supply the electricity-powered portable devices, for example, cellular phone, Laptop, tablets, etc. In addition, decreasing the power consumption to widen the operational life and time, the charging is another critical issue for the battery [1]. Slower charging is considered as wasting time. However, the degradation of battery life and the increase in temperature are caused by a fast charging [2]. The Li-Ion battery is mostly utilized in the automotive feild especialy in the production of electrical vehicules, respecting the global policy on the application of renewable energies and alternative energies [3]- [5].
Thus, the Ni-Cd and the Ni-MH batteries are substitute of the Li-Ion batteries, that due of their high performance [6], but to this day, the Li-Ion batteries are the more used and popular rechargeable batteries, and controls the mobile battery market [7]. Further more, to full-full the purpose of obtaining a reduce production cost, the high efficiency and the necessity of a low complexity of the Li-Ion battery charger interface (BCI) are highly important [8]. The Li-Ion battery renowned as the best energy storage that solve the need of a low cost, a light weight and a long operation time [1]. Therefore, the charging solution for the Li-Ion battery has appealed so intense research efforts regardless in the industry or in the academia [6], [9], [10]. The charger solutions well known are essentially classified into two types, Figure 1 shows the LDO (Low-Dropout) based charger and the switching-based charger [11]. Figure 1. The LDO (low-dropout) based charger and the Switching-based charger [11] The LDO-based charger achieves the benefit of simplicity at the trouble of a poor efficiency. The LDO-based charger respondent for such requests cause of its low current ripple and it may be inserted into the chip without a descriptive component [12]. The lower efficiency is a great problem for it, so the utilization of the Power-MOS as a variable current source is a solution of its low efficiency and also to minimize it dropout [13]. The switching based requires an advanced circuit design to realize a high efficiency, it gives a wide range of the input/output voltage [14]. Further more the switching based is costing a lot of drawbacks, like a worse noise repudiation as of the ripple at a switching rate, and rise power consumption [15].
In addition, these charging systems are typically integrated into a single chip to minimize circuit design complexity through the improvement of CMOS technology. Then, the battery charger is integrated into a System-on-Chip (SoC) to reduce the effect of ripple and noise [15]. Figure 2 shows the charging modes of Li-Ion battery that's consisted of four stages: the first one is the trickle charge (TC), the second one is the constant current (CC) charge, the third one is the constant voltage (CV) charge and the last one is the charge termination [16], [17]. The TC charge mode is activated when the battery voltage (V BAT ) is reduced than the low voltage (V L ), the battery current is kept at a constant low value (0.1C, C represents the capacity of the battery and its unit is (Ah) ampere-hours) to protect the battery from being damaged by an overheating. The CC charge mode is selected when V BAT is between the low voltage (V L ) and the high voltage (V H ), it minimizes the charging time because the battery is charged with a high CC (0.1C-1C).
The CV charge mode is activated when V BAT rise up to the specs value of the V H , which make the charging current (I BAT ) falls to the cut-off (0.02C-0.07C) and the charge process ends. We presented this article at the following: Section II proposes the charging circuit of Li-Ion battery charger interface; Section III presents the simulation results of our charging circuit; and we conclude in Section IV.

PROPOSED CHARGING CIRCUIT OF LI-ION BATTERY CHARGER INTERFACE
Until now, there are numerous research articles have offered a different architectures in order to generate a constant output supply voltage for the Li-Ion BCI using CMOS technology, but their power efficiency is comparatively low due to an increase power loss of the Power-MOSFET [17]- [21]. As a solution of this problem we are going to control the each mode via its identical control signal to improve the power efficiency that will contribute to adapting between the supply voltage of charging and the V BAT . A proposed charging circuit of Li-Ion BCI is illustrated in Figure 3 which includes seven sub-circuits: the mode control, the currents reference, the charge control, the gate driver, the level shifter and the current sensing. The mode control block is concepted to define the charging modes (TC, CC and CV) by comparing the V BAT with the V H and the V L , which are generated from a band-gap block. In other hand the currents reference block produces a desired currents matching to the mode control output voltage. The latter block is followed by a charge control block utilized for comparing between the current sensor I sense and the reference currents to generate the gate voltage (V G ) which assist to control the P-PMOS thanks to the level-shift with a gate-driver circuit. That maintains a constant voltage difference among the supply voltage (V IN ) and the V BAT . The operating principle of each block has been described below.

Mode Control
The mode control circuit is shown in Figure 4. The mode control block circuit is a logic control system consist of two levels from output voltage: a high voltage that means logic level equal '1' and a low voltage that means logic level equal '0'. It contributes to define the V BAT and to produce the control signals (V TC , V CC , V CV ) respectively. The trickle charge voltage (V TC ), the constant current voltage (V CC ) and the constant voltage voltage (V CV ) are resulting from a comparison (by two high speed comparator) of the V BAT with the reference voltages (the V H and the V L ). Therefore, when V BAT is lower than the V L , being only the V TC active. When V BAT is higher or equal than the V L and lower than the V H , being only the V CC active. And when V BAT is higher or equal than the V H , being only the V CV active.
Also, the control voltage signal (V Control ) is sent to the charge control block for generating a charge current in the corresponding charge mode. Figure 5 shows the waveforms of the control signals (V TC , V CC , V CV ), the I BAT and the V BAT . We can observed from Figure 5 Figure 6 shows the currents reference circuit under CADENCE software. It consists of an OpAmp and a Comparator to produce a current reference I Ref which is determined in the equation:

Currents Reference
The first current mirror system consisting of the PMOS transistors (PM2, PM3, PM4, PM5) used in the design, assist to produce a trickle charge current (I TC ), a constant current current (I CC ) and a cut-off current (I Cutt-off ), that are proportional to I Ref . Also, they are utilized as a references proportional in the TC mode, the CC mode and the end of the charge mode, respectively. As well, when the V BAT reaches 4.25V, the high speed comparator with the second current mirror system consisting of a PMOS transistors (PM0, PM1) used in the design, starts to produce a constant voltage current (I CV ) which is decreasing from the I CC to the I Cut-off . The I CV is utilized as a reference proportional in the CV mode. The V TC , the V CC and the V CV generating from the mode control block are used in the currents reference block to control the three switches SW1, SW2 and SW3, respectively. Sending the I TC , the I CC and the I CV to the charge control block in each charge mode (TC, CC, and CV).

Charge Control
The charge control circuit is illustrated in Figure 7. This block is utilized to generate a gate voltage (V G ) to the level-shifter with the gate-driver for driving the Power-PMOS in the each charge mode. The value of the V G is varied with the current I TC-CC-CV by the current comparator which used in the design to compare between the current sensing I sense (generating from the sensing current block) and the current I TC-CC-CV (generating from the currents reference block according to the each mode). The V G is evaluated as the low voltage of the signal selector circuit. The V control (generating from the mode control block) is used for driving the selector circuit that consists of two transistors which is the PMOS (PM2) and the NMOS (NM0).
The last mode is the end of charge mode. This mode is made independently during a comparison between the cut-off current (I cut-off ) and the sensing current (I sense ). Therefore, if the I cut-off is lower than the I sense , the end voltage (V END ) is at the low level that make the V control required level correspond to three charge modes (TC mode, CC mode and CV mode). Else if the I cut-off is higher than the I sense , the V END is at high level that make the V control in the low level which turns off the selector circuit. That means the V G is at the highest level to make the charge process terminated.

Level Shifter and Gate Driver
The level-shifter block is utilized to shift the low gate voltage (V G ) (generating from the charge control block) to a high voltage for driving the Power-PMOS. The level-shifter circuit is illustrated in Figure 8(a). Also, the gate-driver block is connected to the gate of the Power-PMOS which supplies power to the battery charge via the switching action, and then the suitable sum of current is regulated in the battery. The gate-driver circuit is illustrated in Figure 8(b). The level-shifter along side with the gate-driver achieves a rise time around 36 ps, a fall time around 36 ps and a propagation time around 0.25 ns [7].  Figure 9 shows the current sensing circuit, the PMOS transistor (PM0) used in the design like a charge current sensor. The OpAmp is utilized to remain drain voltage of the PMOS transistor (PM0) constant equal to the V BAT . As a result, the I sense has been always proportional to the current of the Power-PMOS.

SIMULATION AND LAYOUT 3.1. Simulation
The proposed Li-Ion BCI design is realized by TSMC 180 nm CMOS technology under Cadence software. In this simulation, the battery capacity selected at 5000 mAh, the value of the V L chosen equal 2.9 and the value of the V H chosen equal 4.2. The waveforms of the mode control signals (The V TC , the V CC and the V CV ) in each charge mode are presented in Figure 10(a). It shows that V TC is active in the TC mode, V CC is active in the CC mode and V CV is active in the CV mode. The simulation results of the I BAT and the I sense are presented in Figure 10 Figure 11(a) and Figure 11(b), respectively. And also, we can observe from the simulation that the battery charges quickly within thirty-three minutes (2 kilo-second). The waveform of the V BAT is presented in Figure 11(a), which shows that a variable value of the V BAT is about 2.7 V to 4.2 V. Also, the waveform of the I BAT is presented in Figure 11(b), which shows that the I BAT in the TC mode is equal 342.7 mA and in the CC mode is equal 1.7 A. As well as the charging procedure is completed when the I BAT is reaching the I cut-off value that equals about 20 mA. Figure 12 illustrated the resulting curve of the power efficiency of the proposed Li-Ion BCI which achieving an efficiency equal 97% of the load current 1.7 A. It is calculated by equation:

. Layout
The layout of the proposed Li-Ion BCI is shown in Figure 13. All devices or circuits prone to produce electromagnetic interference or susceptible to interference are enclosed with double layer guard rings. It is made by respecting the design rules (Density, DRM and MRC) and the designer constraint information (Cat match, text and constraint manager, etc.). It is occupying a total area of 0.03 mm 2 . Figure 13. Layout of the proposed Li-Ion BCI Table 1 is summarized of the simulation results found and a comparative analysis between the proposed Li-Ion battery charger interface and other works/references.

CONCLUSION
A low cost, low size and high speed charge of the proposed Li-Ion battery charger interface (BCI) have been successfully designed and implemented in TSMC 180 nm CMOS process. This study included the circuit design, simulation, analysis and layout design. The proposed Li-Ion BCI using switching-based technique achieves an output voltage V BAT may range from 2.7 to 4.2 V according to an input voltage V IN = 4.9 V, and also achieve a maximum charging battery current I BAT equal 1.7 A. The time charging is only thirty three minutes, the peak efficiency reaches 97% and the total area is only 0.03 mm 2 .