Conducted emission study in space vector modulated voltage source inverter

Received Oct 2, 2021 Revised Mar 27, 2022 Accepted Apr 8, 2022 To comply with electromagnetic interference (EMI) standards, the electromagnetic noise generated by power electronic converters must be analyzed and suppressed since the switching frequency of the converter affects EMI noise. Conducted emission occurs in drive systems due to inverter parasitic capacitances and rapidly switching inverter output voltages. The EMI noise produced space vector pulse width modulation (SVPWM) inverter is calculated using MATLAB/Simulink simulation data. The unwanted common mode and differential mode signals produced by the inverter are captured using a spectrum analyzer and examined using short time Fourier transform (STFT). To mitigate the effect of EMI in the circuit and to comply with the standards filters are developed. The passive filter components are defined by the EMI standards attenuation requirements. The MATLAB simulation findings are confirmed and verified by hardware implementation.


INTRODUCTION
Operating characteristics of inverters has significantly improved due to the advent of high-speed switching of electronic devices. Conducted and radiated electromagnetic interferences are generated due to the fast-switching action. For practical applications adherence of the power electronic circuit to electromagnetic compatibility is mandatory. Analysis of electromagnetic interference (EMI) of power converters at the design stage is important to avoid costly errors at the later stages of deployment of the converter. Hence, modelling of the dynamic behavior of the switching device, and accounting for various parasitic components is an indispensable part of EMI studies. EMI is caused due to common mode and differential mode noises [1]. Common mode (CM) and differential mode (DM) noises are to be analyzed analytically and its effect needs to be mitigated using appropriate mitigation techniques before actual hardware prototyping.
Research areas are focusing on addressing the complications imposed by the fast switching devices on PWM drive applications. EMI filter design for single-phase grid-connected inverter with noise source impedance consideration is presented in [2]. Frequency domain model for an inverter is presented by Drozhzhin [3]. Modified nodal analysis using state space average model is analyzed [4]. Bondarenko [5] has designed a power inverter and analyzed the Electromagnetic compatibility. Analysis of conducted emissions in the powertrain of electric vehicles is presented by Spadacini et al. [6]. Model for conducted emission of SiC Power Modules for automotive traction is presented in [7]. Detailed study on conducted emissions of an inverter for filter development in high voltage networks is researched [8]. Soft switching topologies also reduce the current distortion [9]. Soft switching for inverter and the effect on EMI mitigation is presented in [10]- [12]. Hard switching power losses are higher compared to soft switching due to fixed value of the DC VOLTAGE in hard switching and a sinusoidal oscillation of the DC voltage in soft switching.
Hanioka et al. [13] has researched on switching control method for voltage-source PWM inverters to eliminate conduction noise between phases. Common-mode EMI comparison for different PWM techniques is explained in [14]. Noise reduction method for three-level V-connected inverter using SVPWM is analyzed by Itoh et al. [15]. In this paper a SVPWM based three phase inverter is analyzed in detail and the switching configurations are simulated in MATLAB. For conducted emission estimation the equivalent circuit of the inverter is analyzed in MATLAB. The harmonic currents are measured by inserting standard line impedance stabilization network (LISN) in the power line. The common mode and differential mode noises generated at the point of coupling between the LISN and converter under test is measured using spectrum analyzer. The measurement values obtained in the spectrum analyzer depicts the noise levels generated by the converter. To comply with the stipulated EMI EMC regulatory standards 3rd order EMI power line filter is designed to attenuate the noise levels beyond 150 kHz and maintain the noise levels within the specified band. The prototype of the SVPWM based 3 phase inverter and EMI filter was realized in hardware and tested for conducted emission.

SVPWM BASED MODULATION SCHEME
SVPWM is a technique used to calculate the PWM signals for the switches to generate the required 3-phase voltages for the motor. It is widely used in industrial application due to efficient use of DC bus voltage, reduction in harmonic distortion, and relatively easier digital implementation [16]. Space-vectoris a single complex number representing the combined effect of all three phase currents in an AC machine at a particular instant of time. Vector sum is obtained by adding the three vectors and its magnitude is always constant. The operation of the three phase inverter is governed by six switches shown in Figure 1, comprising of eight inverter configurations.

Figure 1. Three phase inverter configuration
Each configuration is mapped into corresponding space vectors. In each configuration, '0' represents negative phase voltage level and a '1' represents positive phase voltage level. Necessary pulses are generated to sequentially turn the inverter switches (IGBTs) ON and OFF. To prevent vertical conduction appropriate care needs to be taken to prevent overlapping during transition of switches. Two adjacent voltage vectors are selected based on the sector in which the reference vector is present. The voltage vectors are represented in a binary format and differ only by one bit, so that the transition from one adjacent vector to the other requires the operation of only one switch at a time. The two vectors are weighted according to time, during a sampling period of time T to give the required output voltage as shown in Table 1. The reference vector selects two neighboring voltage vectors. The voltage vectors are stored in binary and vary only by one bit, thus switching between them needs just one switch at a time. [101] S1,S6,S5 Assume the voltage reference vector, Vref, lies in the first sector as shown in Figure 2, between the standard vectors V1 and V2. Vref is produced by a combination of V1 and V2. If the duration of the pulse is , the period for which for vectors V1and V2will be ON are: Where |Vref |maxis equal to two-thirds of the applied DC voltage to the inverter. |Vref |max and are known quantities. The values of V1and V2can be determined from Table 2. Figure 2. Space vector representation-sector I Table 2. Calculation of r, land time for various sectors and quadrants During the pulse period , the vectors V1 and V2 are applied for duration of r and l respectively. In the remaining time period, i.e., − ( r + l), either of the two zero vectors V0 or V7 are applied. If the previous switching state was V0, and then the sequence would be V0, V1, V2 and V7. If the last switching state was V7, then the sequence is V7, V2, V1 and V0. SVPWM for a three phase inverter was simulated in MATLAB. The parameters used for simulation are tabulated in Table 3.
First three phase to two phase transformation (Clarke transformation) is performed, the corresponding sector is identified and then the switching vector for each sector is calculated. Using volt second balance the active vector timing is estimated and then the gating time period for each leg is calculated. The three phase voltage waveform generated using SVPWM technique for modulation index of 0.5 is shown in Figure 3.  Figure 3. Three phase voltage wave form generated using SVPWM

CONDUCTED EMISSION FOR 3 PHASE INVERTER
Rapid turn on and turn off of power transistor causes abrupt disruptions in current flow, leading to high voltage ringing and spikes. Study of EMI and filter design is dictated by the deployment condition, EMI standard, noise source and propagation path conditions. EMI analysis and filter design can be challenging, necessitating a time-consuming iterative process of design, testing, and redesign. Conducted EMI noise analysis and filter design can be predicted to speed up the process of meeting EMI requirements. The objective of modeling is to analyze the noise emissions at the preliminary design stage.

Noise: Common mode and differential mode
The phase currents can be characterized by differential and common mode (DM&CM) analysis [17]. The peak CM voltage occurs at zero vectors, whose duration is modulation index dependent. Harmonics are generated due to the distorted currents. Since, the amplitudes and harmonic components change with time, conventional Fourier transform, is not sufficient. Study based on short time Fourier transform (STFT) is used to determine the frequency and phase of local segments of a signal as it changes over time [18]. STFT computes the Fourier transform on each shorter segment of a larger temporal signal.

Simulation of conducted emission of the converter
For simulating the common-mode noise, capacitive coupling (Cb) between the circuit and ground plane and also capacitance between the ground plane and switching node (Cs) is included. Ideal line impedance stabilization networks (LISNs) are placed between each terminal of the DC supply and the inverter to provide a standard impedance and measurement port for the noise [18]. The CM excitation is captured in a spectrum analyzer as shown in Figure 4.
Conducted emissions tests for automotive electronics should comply with CISPR 25 or EN 55025 standards. A per guidelines of CISPR 25 [19], noise signal at LISN is to be measured to study the EMC behavior. Voltage across the 50-ohm resistor is shown in Figure 5(a) and Figure 5(b). It can be seen that the harmonics depends on the switching frequency. Common mode voltage (Vcm) and differential mode voltage (Vdm) can be calculated as [20]. Implementation of (2) and (3) is shown in Figure 6. The sample frequency is 500 kHz (>>2x150 kHz) and STFT is applied to the collected signal. The average of the FFT results for each 200 ms window is calculated. Figure 7(a) and Figure 7(b)indicate that the interference voltage values between 150 kHz and 100 MHz are above the CISPR 25 emission requirements mentioned in Table 4. Increasing the switching frequency from 25 kHz to 40 kHz also increases the noise levels.

EMI FILTER DESIGN
EMI filters are designed to provide attenuation. The required corner frequency (fc) is determined based on the required attenuation (A) of the noise at a particular frequency (f) [21]- [23]. The attenuation for a third order filter and the required corner frequency (fc) to achieve the desired attenuation (A) is given by (4). The chosen 3 rd order filter topology is shown in Figure 8. Common mode current is suppressed by inductors series with the power line and Y capacitors between the power line and ground. X capacitors between the lines minimize differential mode noise. Three poles (with the appropriate corner frequency) are added by inserting inductor between the second order low pass filter and the third pole (with the required corner frequency) [24], [25]. Figure 7 shows a noise level of 85 dB at 150 kHz, which is 25 dB higher than the intended use. For a 3rdorder filter, fc=30 kHz, and Load Resistance = 50. The inductance is calculated as: Choosing damping factor, ζas 0.707 provides 3 dB attenuation at fc and also controls filter ringing Choke, L1= 375 µH (L1 = 1.1 mH, to compensate for reduction or capacitance it is chosen 300% larger) Attenuation at 150 kHz is 24 dB (second order filter) + 2.9 octave × 6 = 41.4 dB. X Capacitor: in differential mode, cut-off frequency of the filter is equal to fDM = 150 kHz.
FFT analysis of the signal captured across the LISN is shown in Figure 9. It can be seen that there is a considerable reduction in noise after insertion of the EMI filter as in Figure 10.

TEST SETUP AND RESULTS
The inverter model is validated by experimental investigation on the 200 W full-bridge inverter prototype designed using power MOSFET IRFP250 power module with a switching frequency of 25 kHz. A DC LISN is used to provide the defined impedance for the device. A test bench is used to perform the test and subsystems are placed as shown in the schematic diagram in Figure 11.A LISN's RF port connects directly to a spectrum analyzer. Initially, the projected emission level was at 85dBV, which is over the safety limits. Installation of the planned EMI filter between the power line and EUT, lowered emission rates to less than 40 dBV as in Figure 12 which is below the CISPR25 limits. The filter shields equipment from noise generated by DC power supply and other transient loads as well as noise generated by power converters. Because the peak and average values are less than those in Table 4, the power converter circuit meets the criteria. Figure 11. Test setup for inverter Figure 12. Noise after addition of EMI filter

CONCLUSION
In this work, SVPWM modulated three phase inverter is modelled and simulated to measure conducted emission. The emission levels are higher than expected standard level. EMI filter is designed to mitigate the common mode and differential mode noises. The common mode filter components are constructed based on the insertion loss and required attenuations. The filter is placed in between the power supply and the inverter and conducted emission tests were performed. The noise levels are reduced, and it meets the CISPR 25 standards. The hardware prototype is also setup and measured. Power converters must have an EMI-compliant common mode filter to guarantee electromagnetic compatibility. Future study will examine the effect of the connecting cables and the three-phase load.