A series-resonant inverter with extended topology and pulse- density-modulation control for induction heating applications

Received Nov 11, 2021 Revised Jan 20, 2022 Accepted Jan 26, 2022 This paper presents a series-resonant inverter (SRI) with an extended topology using a pulse-density modulation (PDM) control method. Theoretical analysis shows that the use of the SRI with extended topology and the PDM control (extended PDM-SRI) allows reducing the fluctuation of the SRI output current by more than 40% at the quality factor of 5 compared to a conventional SRI with the traditional PDM control. To eliminate drawbacks of the extended PDM-SRI, specificities of PDM switching sequences to ensure the zero-voltage-switching (ZVS) operation are discussed in detail, and a solution to the voltage imbalance across the capacitors of the extended topology is proposed. Simulation analysis of the extended PDM-SRI confirmed the effectiveness of using the proposed solutions to eliminate the drawbacks. The feasibility of the proposed SRI is confirmed by testing on a 2.2 kW experimental setup.

represents inductances of the workpiece, the induction coil, the gap, and resistances of the workpiece and the induction coil [30], [31]. The values of these parameters depend on geometries and materials of the induction coil and workpiece, and the operating frequency of the SRI. To obtain a series-resonant circuit, a capacitor Cr is usually connected in series with the secondary winding of the matching transformer and the load. Typically, the PDM control method is used in inverters with the full-bridge topology, because with this topology it is possible to obtain the injection and free-wheeling intervals [1], [2], [7]- [9]. This control method is also suitable in inverters with the half-bridge topology [10]. In this case the PDM-SRI produces two intervals: an injection one with a square-wave ac-voltage equal to half the SRI input voltage, and a rejection one, when the resonant circuit energy is transmitted to the capacitors of the half-bridge topology. As a consequence, the amplitude fluctuations of the SRI output current are higher.

Pulse-density modulation-series-resonant inverter with extended topology
To reduce the amplitude fluctuations of the PDM-SRI output current iO it is expedient to combine operation modes of full-bridge and half-bridge inverters [29]. For this purpose, the extended inverter topology is used, which combines topologies of full-bridge and half-bridge inverters [29], [32], [33]. The extended inverter topology consists of switching devices (Q1-Q4) of the full-bridge topology, two capacitors (C1 and C2) of equal values of the half-bridge topology, and an additional bi-directional switch Figure 2. The capacitors are series-connected across the DC source (Vd), and the SRI input voltage Vd is split by these capacitors into two equal sources with a voltage of Vd/2. The bi-directional switch is implemented with two back-to-back connected transistors (Q5 and Q6) in a typical source configuration. This switch is connected between the center tap of the series-connected capacitors and the center tap of the transistors Q3 and Q4; it is used to separate the operating modes of the full-bridge and half-bridge inverters. The secondary components of the matching transformer (inductor Leq, resistor Req, and resonant capacitor Cr) are reflected to the primary side and represented as R, L, and C, respectively. The eight topological stages of the extended PDM-SRI are shown in Figure 3. With these stages, four modes of operation for the extended PDM-SRI can be obtained: Mode 1-stages 1 and 2 are used to produce the injection interval (TA) during which the inverter acts as a square-wave ac-voltage source with the amplitude Vd for m cycles of the period TO of the SRI output voltage υO; Mode 2-stages 3 and 4 are used to produce the injection interval (TC) during which the inverter acts as a square-wave ac-voltage source with the amplitude Vd/2 for l cycles of TO; Mode 3-stages 5 and/or 6 are used to produce the free-wheeling interval (TB) during which the inverter acts as a zero-voltage source for n cycles of TO; Mode 4-stages 7 and 8 are used to produce the rejection interval during which the energy of the resonant circuit is transmitted to Vd source.  To reduce the amplitude fluctuations of iO, it is expedient to combine mode 1 with mode 2, and mode 2 with mode 3, where mode 2 acts as an intermediate link between modes 1 and 3. It is not necessary to use mode 4 because when this mode is combined with modes 1 or 2, the amplitude fluctuations are higher compared to combining mode 3 with modes 1 or 2. Combining mode 4 with mode 3 is unreasonable; since both stages 5 and 6 ensure a zero-voltage state, it is sufficient to use only one of them to create mode 3. Figure 4 shows the PDM control principle for the extended PDM-SRI: case I -TA is combined with TC; Case II -TC is combined with TB. The duration TM of the PDM sequence can be expressed is being as: where k is the number of cycles of TO during TM. The value of k may be constant for all PDM patterns of the regular and irregular PDM [9], [16], or it can be inconstant [12], [25]. The frequency of PDM sequences is given by: For the extended PDM-SRI, the pulse density D of PDM patterns can be expressed is being as:

Analysis of extended pulse-density modulation-series-resonant inverter output current
Typically, the SRI operates slightly above the resonant frequency to provide ZVS. But to simplify the mathematical analysis, the following two assumptions are made: the SRI operates at the resonant = 1/√ , and the quality factor Q of the resonant circuit is high enough to neglect higher harmonics in υO. In this case υO can be represented is being as: where V1 is the first harmonic amplitude of υO (V1 = 4Vd/π during TA, V1 = 2Vd/π during TC, and V1 = 0 during TB). In a steady-state operation, when the extended PDM-SRI operates only in mode 1, the output current iO is given by: where Im is the maximum current amplitude in the case of D = 1, and is given by: in case Icombination TA and TC Figure 4, the output current iO is given by: where τ is the time constant of the envelope of iO, and is given by: when the extended PDM-SRI operates only in mode 3, the output current iO is given by: in case IIcombination TC and TB Figure 4, the output current iO is given by: It is convenient to submit τ through the PDM parameters m, l, n, k, and the quality factor Q. In this way, (7) is given by: and (10) is given by:

Analysis of extended pulse-density modulation-series-resonant inverter output power
The average output power is given by [1], [9]: where φ is the phase-shift between the fundamental frequencies of υO and iO, and iE(t) is the envelope of the resonant current; in case I iE(t) is given by: and in case II it is given by: (13) changes into the following equation: The average output power can be calculated through the PDM parameters and Q is being as: − in the case of full power (D = 1), when the SRI operates as a conventional full-bridge SRI − in case II

Amplitude fluctuation
The fluctuation of iO can be estimated in two ways: by the peak-to-peak value of the envelope iE of iO [1], and by the absolute peak-to-peak value of the amplitude of iO [29]. It is convenient to estimate the fluctuation by the peak-to-peak value of iE since there are only one maximal value iEmax and one minimal value iEmin of iE within TM Figure 4. Thus, the fluctuation can be estimated as the difference between iEmax and iEmin [1]. The normalized value of the fluctuation by iE is given by:  The disadvantage of this approach is that the real absolute peak-to-peak value of the amplitude fluctuation is somewhat less. That is due to the fact that the maximal and minimal amplitudes of iO are at points that differ from the points of iEmax and iEmin Figure 4. Let's consider the estimation of the fluctuation by the absolute peak-to-peak value of the amplitude of iO. The maximal and minimal values of the current amplitude can be found for both active modes of the extended PDM-SRI Figure 4. Assuming that the exponential part of iO does not significantly affect the sinusoidal one during one half-period of TO, the minimum amplitude value Imin and the maximum amplitude value Imax of iO can be determined for case I from (11) and for case II from (12) at points corresponding to 0.25 TO after the beginning and until the end of the active modes. The normalized minimum and maximum current amplitudes are given by: In this way, the normalized absolute peak-to-peak current amplitude fluctuation ∆I * m is given by:  I  I  I  I  I  I  I  I The disadvantage of this approach is that it is necessary to determine which of the maximum amplitudes is higher and which of the minimum ones is lower. Figure 5 shows the relationship between the Int J Pow Elec & Dri Syst ISSN: 2088-8694  fluctuation and the pulse density D, as well as the effectiveness η of fluctuations reducing at various values of Q, which are obtained for the envelope of current Figure 5(a) and peak-to-peak current Figure 5(b). The effectiveness shows the relative reducing ∆I * E and ∆I * m when using the considered PDM-SRI with the extended topology compared to the PDM-SRI with the full-bridge topology at the same values of D, and is given by: The effectiveness η exceeds 50% and reaches 100% at D = 0.5, as shown in Figure 5. The combinations of the PDM parameters used to calculate ∆I * are given in Table 1. For the sake of simplicity, the PDM patterns were chosen with inconstant values of k, since otherwise PDM patterns with the irregular PDM and constant values of k may contain different values of the PDM parameters within one TM, which complicates the determination of ∆I * . When the PDM control method is used, the current control is limited by the available combinations of the PDM parameters. The control system monitors the change in the feedback signal between iO and the level of the current task signal, and being based on the feedback level, selects the appropriate combination of the PDM parameters to provide the required value of D. However, when the required value of D cannot be realized with one of the available PDM combination, the control system will change two nearby PDM combinations whose values of D are the closest to the desired one Figure 6. Thus, for Di < D < Di+1 (where Di and Di+1 are two adjacent values of the pulse density which are the closest to the desired one and can be realized by the available PDM combinations) the amplitude fluctuation level will be determined by the action of the two PDM combinations and can be approximately defined is being as: Figure 7 illustrates similar charts to Figure 5, but for the case when the fluctuation is determined by (32). As can be seen, at a low value of Q = 5, the effectiveness η of fluctuations reducing is more than 40%.

Minimal current amplitude
In order to avoid non-ZVS operations of the SRI transistors, it is necessary to set a certain value of dead-time TDT between the control signals of the SRI transistors. The value of TDT depends, amongst other things, on the current amplitude value [7]- [9]. Thus, on the one hand, TDT can be set constant and must be enough to ensure ZVS under different values of the parameters on which it depends. On the other hand, it can be changeable [31]. In the case of a low value of Q, dynamically changing the value of TDT is a complex task and requires high-speed mathematical calculation as well as measurements of current and voltage parameters with high accuracy. In the case of the constant TDT, the minimal current amplitude is important and the current fluctuation influences this amplitude value.
Let's consider how using the proposed extended PDM-SRI allows increasing the minimal current amplitude compared to the full-bridge SRI with the traditional PDM control method. Figure 8 shows the difference between normalized values of I * min for the same D and Q = 5 for the mentioned above SRIs. As can be seen, if the current regulation is limited by values of D in the range of 0.25 to 1, the minimum amplitude value can be doubled. Thus, it is possible to reduce the value of TDT, and as a consequence, the switching losses will be lower. Or, if the dead-time value does not change, the range of D can be extended by 8.5%.  Figure 9 shows the SRI with extended topology, where CS is the total capacitance of the snubber capacitor and the parasitic capacitances of the transistors. The main drawback of the extended PDM-SRI presented in [29] is the problem of reverse-recovery of a transistor body-diode. This problem arises in two cases Figure 10: 1) when mode 1 is changed to mode 2, and 2) when mode 3 is changed to mode 2. Let's consider it more deeply (in both cases mentioned, mode 2 is implemented using only stage 5).

Reverse recovery problem
In case I Figure 10 (a), the extended PDM-SRI operates slightly above the resonance frequency. In mode 1 the SRI operates like a conventional full-bridge inverter. There is a certain dead-time TDT between the control signals of the transistors to prevent shoot-through-current. During TDT, CS are fully recharged until the next pair of transistors turns-on. After recharging CS, a pair of body-diodes starts to work and the switching of the transistors occurs with ZVS. At the end of mode 1, the bi-directional switch is turned-on within TDT. At this moment, one of the active diodes is supplied with half of the inverter input voltage from the capacitor of the half-bride inverter topology, and as a result of this, the shoot-through-current flows through the circuit D4-D5-Q6. In case II Figure 10 (b), at the end of mode 3 we have a similar situation to the previous one. After recharging CS a pair of the body-diodes works, and the bi-directional switch is turned-on, resulting in a shootthrough-current flowing through the circuit D4-D5-Q6. In addition, it is possible to provide that the bidirectional switch would be switched after a current zero-crossing. But in this case, the shoot-through-current will flow through the circuit D3-D5-Q6. Therefore, this is not a solution to the problem.

Solution of reverse recovery problem
In the described extended topology, the bi-directional switch is implemented with two back-to-back connected transistors (Q5, Q6) in a typical source configuration. A solution to the reverse recovery problem can be found through the change in the control signal of the bi-directional switch. In this way, the control signals Q5 and Q6 of transistors Q5 and Q6 are different, therefore the bi-directional switch will be seen below as two independent transistors Q5 and Q6. So, Figure 11 (a) shows the switching sequence of the extended PDM-SRI without the diode reverse recovery problem in case I, and Figure 11 (b) for case II, respectively. Both for cases I and II during the diode operation interval (at the end of mode 1 in case I and at the end of mode 3 in case II), it is expedient to turn-on only one of these transistors-the transistor Q5. Since Q6 is still turned-off, there is no problem with the reverse recovery of a transistor body-diode. At the end of the diode operation interval, the current flow changes, and iO flows through Q1, Q5, and D6. As it is depicted in Figure 11, within this interval, after CS is recharged, Q6 must be turned-on. Such a change in the control signals of Q5 and Q6 is sufficient to avoid the reverse recovery problem caused by the common control signal Q5,6 of the bi-directional switch.

Voltage imbalance across capacitors
The second drawback mentioned in [29] is the voltage imbalance across the capacitors C1 and C2. This is caused that during mode 2 different currents flow through C1 and C2, which leads to an increase in voltage across one of the capacitors and a decrease across the other. In case I the envelope of iO falls during mode 2, causing the voltage across C1 to decrease and the voltage across C2 to increase. But in case II the envelope of iO rises during mode 2, causing the opposite situation-the voltage across C1 increases, and the voltage across C2 decreases. Therefore, it becomes necessary to balance the capacitor voltages.

Voltage imbalance across capacitors
A simple solution to this problem is to use the Delon circuit (a bridge voltage doubler circuit), because there is no need to use controlled devices. In this case it is necessary to use two diodes, a transformer and, as an option, a resistor connected as it is shown in Figure 12. The balancing resistor is used as an inrush current limiter and can generally be neglected due to the resistance of the transformer windings of the balancing circuit. Thus, when the voltage across one of the capacitors is higher than the other one, the energy of that capacitor will be transferred to the other one.
In case II during modes 1 and 2, the input voltage of the balancing transformer is half-wave symmetrical due to the pattern sequences of the control signals, and its frequency is equal to the frequency of υO. However, when mode 3 is implemented using only stage 5, the input voltage of the balancing transformer will be asymmetrical and the effectiveness of the balancing circuit will be less. Thus, to avoid the asymmetrical voltage, it is reasonable to use mode 3 implemented using stage 5 within one TM, and to use mode 3 implemented using stage 6 within the next TM. But in this case, when mode 2 is changed to mode 3, the reverse recovery problem arises, similar to the one when mode 3 is changed to mode 2, and the shootthrough-current flows through the circuit Q3-D4. Thus, to avoid this current, Q3 must switch when the direction of iO changes and D3 starts to operate. The resulting sequence of control signals Q1-Q4 ensuring the ZVS operation of the extended PDM-SRI transistors in case II is shown in Figure 13. In such a way, in case II there is no reverse recovery problem, the input voltage of the balancing transformer will be symmetrical, and its period will be (2k -1) times more than the period TO.

Simulation results
The extended PDM-SRI has been modeled in the MATLAB/Simulink environment. Simulations are carried out for the two mentioned above cases of combining the operation modes of the extended PDM-SRI. Figure 14 shows waveforms of the output voltage υO and output current iO, as well as voltages υC1, υC2 across C1 and C2, the current through Q4, and the current iQ5, Q6 through the bi-directional switch, when the  Figure 14 (a) for case I and Figure 14 (b) for case II. It can be seen in Figure 14 (a) that in case I υC1 decreases, and υC2 increases during the modeling process, but in case II there is the opposite situation, as it is shown in Figure 14 (b). In both case I and case II the shoot-throughcurrent flows through the switch devices Q4-Q6. Figure 15 shows waveforms for the case when the control signals were changed in accordance with the ones proposed in section 5, and the mentioned above balancing circuit was used Figure 15 (a) for case I and Figure 15 (b) for case II. It can be seen that these changes in the control signals are sufficient to ensure the ZVS operation of the SRI transistors and to avoid the shootthrough-current. In general, there is no imbalance of the voltages υC1 and υC2 both in case I and in case II, and υC1 and υC2 fluctuate only slightly owing to C1 and C2 charging and recharging.  Figures 16 (b)-(d) when within one TM mode 2 is combined with implemented using stage 5 mode 3, and within the next TM mode 2 is combined with implemented using stage 6 mode 3 (under (k;l;n) = (2;1;1) Figure 16 (c), and under (k;l;n) = (3;1;2) Figure 16(d). Thus, when using only one of stages 5 or 6 in case II, υTV(bc) has an asymmetrical duty-cycle. Therefore, the use of the balancing circuit is less effective for balancing υC1 and υC2. Besides, υTV(bc) contains a DC component. So, the alternation of stages 5 and 6 in the way described above makes it possible to ensure the symmetrical υTV(bc) and, as a result, to increase the effectiveness of balancing υC1 and υC2 with the balancing circuit. However, owing to the shape of υTV(bc) in case II, the balancing circuit transformer must be rated for a frequency with period (2k -1) times more than TO, as is shown in Figure 16 (d). Figure 17 shows waveforms of υC1 and υC2, the currents iD(bc) through the diodes of the balancing circuit, and the currents (iC1 and iC2) through C1 and C2, as well as the interrelationship between these voltages and currents. In case I, only one diode of the balancing circuit diodes works; in case II, mode 2another one. The resistor of the balancing circuit together with the resistance of the balancing circuiting transformer windings affects the imbalance of υC1 and υC2. On the one hand, the lower the total value of the resistances is, the more effective the balance circuit is. But the inrush current of the balancing circuit operating diode is higher. On the other hand, an increase in the total value of the resistances makes it possible to reduce the inrush current. Still, this current limitation can lead to some imbalance in υC1 and υC2 owing to transferred charge and, as a consequence, to the appearance of a DC component in υO. In general, the simulation results confirmed the effectiveness of the proposed solutions to eliminate the above-mentioned drawbacks of the extended PDM-SRI.  Two main tasks of the experimental setup control system are the generation of the above-described switching sequences and phase synchronization between υO and iO for performing ZVS during the SRI operating. Therefore, the STM32G474RCT6 microcontroller (MC) of the STM32 G4-series was chosen for its ability to generate up to ten PWM signals by its high-resolution timer (HRTIM) [34], [35]. A schematic depiction of the control system structure is shown in Figure 19. The HRTIM has to generate six control signals, which differ depending on the operation modes of the extended PDM-SRI and sequencing of changes in the acting PDM combinations. Figure 20 shows the control drive sequences generated by HRTIM for various cases of the PDM combinations. In the presented To ensure all of the PDM combinations shown in Table 1, HRTIM must generate at least twelve control drive sequence shapes: six in the case of 0.5 ≤ D ≤ 1 Figure 20 (a) and six more in the case of 0 ≤ D ≤ 0.5 Figure 20 (b). A kind of shapes the HRTIM has to generate will depend on the sequence of changing the PDM combinations. Thus, the shapes of the control drive sequence of the same PDM combination may differ.  Figure 21 shows the experimental υO and iO waveforms of a full-power (D = 1) in the steady-state operation obtained by the setup. Experimental waveforms of υO and iO in case of using the extended PDM-SRI versus the full-bridge PDM-SRI for different D values are showed in Figure 22 (seen in Appendix).  Figure 22 (e) on the left side shows experimental waveforms for the extended PDM-SRI in the case of combining modes 2 and 3, when D = 0.33. On the right side of Figure 22 experimental waveforms for the full-bridge PDM-SRI, respectively for the same D value of the extended PDM-SRI, are shown. The operating frequency of the SRI was close to 34 kHz. Figure 23 shows the relationship between the current amplitude fluctuation and the output power when using the proposed PDM-SRI versus the fullbridge SRI with the traditional PDM. The fluctuation was calculated from the waveforms of iO. The Q value during the experiments was close to 6.

Experimental waveforms
The resulting waveforms are fully in line with expectations. Since different shapes are required based on the sequence of changing the PDM combinations, different sequences have been stored in the MC memory for the same pulse density, and MC choses the appropriate sequence being based on the change of D. So, there is no problem with changing the sequence. Through ongoing experiments, the TDT value was kept constant. To reduce the switching losses in the inverter transistors, the TDT value must be changeable [31]. Owing to fluctuations, changing the TDT every TO is challenging. On the other hand, the required TDT value can only be determined for the minimal current amplitude. But calculating it correctly and promptly at a low Q value is a complex task. To avoid inrush current during start-up, the initial frequency of the extended PDM-SRI was 50 kHz. During the start-up process, it is possible to obtain the non-ZVS operation of the extended PDM-SRI if the time shift in the control signals of Q3 and/or Q6 is too small, as shown in Figure 24(a). On the other hand, in a wide range of operating frequencies, it is also possible to obtain non-ZVS if the time shift is too large. Therefore, the time shift was set dynamically variable and equal to a quarter of the actual TO. For this case, in Figures 24(b) and 24(c) the waveforms of υO and iO within the start-up process and in the steady-state operation, respectively, are shown. In both cases, the extended PDM-SRI operates with ZVS. In general, the experimental results confirm the feasibility and performance of the proposed extended PDM-SRI. It is also worth noting the significant size of the balancing transformer due to the low frequency of its input voltage at low values of D. In the experimental setup, the size was close to half the size of the matching transformer. To reduce the dimension of the balancing transformer, it is possible for D < 0.5 to use the PFM control method instead of the PDM one. In this case, the input voltage frequency of the balancing transformer will be equal to that of the matching one. Furthermore, one diode of the balancing circuit will be needless. Moreover, there will be no amplitude fluctuations of the SRI current. On the other hand, the dynamic losses in the SRI transistors will be higher.

CONCLUSION
The extended PDM-SRI for induction heating applications which is proposed and analyzed in the paper, has serious advantages in comparison with other types of PDM-SRIs. Such kind of the extended PDM-SRI allows to reduce the fluctuation of the SRI output current compared to the traditional PDM-SRI or reduces the number of required switching devices compared to a modular converter, which is based at least on two inverters connected in series, with an interleaved or a stepped PDM control method. A PDM control method and soft-switching operation of the proposed SRI were theoretically analyzed, explained, and verified with simulation. The experimental setup of a 2.2 kW extended PDM-SRI has confirmed its feasibility.