A hybrid reference pulse width modulation technique for binary source multilevel inverter

Received Jul 17, 2021 Revised Mar 29, 2022 Accepted Apr 13, 2022 The article presents a seven-level reduced switch asymmetrical multilevel inverter with two different methods of pulse width modulation (PWM) techniques. Phase disposition (PD) PWM and hybrid variable-frequency phase disposition PWM (HVFPD-PWM) are the two different PWM methods for making the quality of output voltage waveform. In the first method, the unipolar sine reference with triangular carriers is used. In the second method, the hybrid unipolar reference (sinusoidal with trapezoidal) is proposed with variable frequency carriers to generate the switching pulses for asymmetric multilevel inverter (MLI). The main objective of this proposed method is to reduce the total harmonic distortion in the output voltage waveforms. A comprehensive comparison of the proposed HVFPDPWM and the conventional PD-PWM with asymmetrical seven-level inverter is presented to show the enriched performances of the proposed method. The performance and viability of the suggested PWM are evaluated through simulation and experimental results using an asymmetrical sevenlevel inverter. The total harmonic distortion for the proposed PWM method (16.95%) is significantly reduced as compared with the conventional PWM method (18.01%) at the modulation index of one.


INTRODUCTION
In latest past years, multilevel inverters (MLIs) are greatest key solutions for medium voltage and high-power energy conversion fields. A MLI with reverse voltage topology has been presented in [1] with fewer switching components. Moreover, the presented MLI utilize phase disposition-pulse width modulation (PD-PWM) scheme to obtain corresponding output voltage levels. However, the significance of PWM scheme is not discussed against performance factors. A seven-level hybrid inverter configuration with fundamental harmonic elimination switching scheme have been presented in [2]. However, the drawback of proposed topology is quite complex for higher number of voltage levels. The reduced flying capacitor MLI configuration has been presented in [3]. It has also introduced new phase shifted carrier PD-PWM technique. However, the proposed carrier based PWM technique requires (level-1) carriers and comparators for switching signal generation.
A new configuration of MLI has been presented in [4]- [6] with less number of power electronic components. The control signals for the switch are generated using bipolar sinusoidal PD-PWM scheme. However, harmonic distortions are analyzed only for fixed modulation index. Synchronous optimal PWM scheme has been presented with modular multilevel converter in [7]. However, the drawback of presented  [8], [9]. A detailed literature of various multicarrier PWM technique is presented in [10]. Moreover, modified reference and carrier signals are used to obtain the gating pulses. The modulation switching scheme is presented in [11]. However, the presented scheme is implemented only for cascaded MLI structure and harmonic performance alone studied for cascaded MLI. Sequential switching hybrid modulation scheme have been presented in [12]. However, the presented scheme is implemented only for cascaded MLI structure and harmonic performance are studied for cascaded MLI. The presents a new modulation strategy with modified reference signal to reduce the switching losses in [13], [14]. However, discontinuous PWM scheme have higher harmonic content in output voltage. A new hybrid modulation technique is proposed for cascaded Hbridge inverter and it can be stretched to any quantity of carriers for higher quantity of output stages in [15]. The seven-level modified inverter with level shifted and phase shifted PWM schemes has been presented in [16]. However (level-1) triangular carriers required to generate gating pulses. Level shifted techniques are often used to regulate and control the inverter [17]. Saw tooth carrier-based phase disposition PWM technique are presented in [14]. Moreover, this modified carrier signal reduces the switching loss due to removal of continuous switching transients. A new PWM techniques based on different carrier are presented in [18]. However, this new carrier based PWM techniques are not effective in terms of root mean square (RMS) voltage and harmonic distortion. The reduced switch asymmetrical multilevel inverter with different classical PWM techniques has presented in [19]- [21]. Modular seven level inverter configurations are proposed for grid connected photovoltaic (PV) system in [22], [23]. However, the proposed topology presented with conventional switching techniques. The reduced switch and source multilevel inverter for renewable power applications are proposed in [24]. However, the presented topology utilizes more number of switches and sources. Modified hybrid multilevel PWM are presented in [25]. However, it necessitates special setup to develop the PWM signal. The modified configuration inverters are presented in literature with conventional and modified PWM technique. Though, the inverter performance can be further enhanced in terms of total harmonic distortion (THD) and RMS voltage. Therefore, in this paper, hybrid carrier unipolar pulse width modulation named as hybrid variable frequency PD-PWM (HVFPD-PWM) is proposed to improve the performance over conventional methods. Hence, a comprehensive comparative analysis of VFPD-PWM and the classical PD-PWM is presented to show the superiority of suggested PWM technique.

SINGLE PHASE ASYMMETRICAL SEVEN LEVEL INVERTER
A circuit topology of seven level asymmetrical inverter [16] is depicted in Figure 1. The MLI comprises of two series connected sub-multilevel inverters with active power switches and direct current (DC) source as shown in Figure 1 to get positive polarity of output levels and a H-bridge cell is used to get output in both the polarity. The H-bridge is design in such a way that it should carry high voltage. When the output voltage Vout is +VDC, the pair (S2, S4) and (A1, A2) are ON. When the output voltage Vout is +2VDC, the pair (S1, S3) and (A1, A2) are ON. When the output voltage Vout is +3VDC, the pair (S1, S4) and (A1, A2) are ON. The zero-output voltage is obtained when (S1, S4) and (A1, A2) are ON. In the same approach, the other levels -VDC, -2VDC, and -3VDC are generated. Table 1 shows the switching scheme with corresponding levels.  Figure 2(a) and Figure 2(b) depicts PD PWM and hybrid VFPD-PWM for seven level reduced switch inverter with unipolar PWM strategy. The unipolar PWM strategy requires half of the carrier signals compares with bipolar PWM strategy. In both PD PWM and VFPD-PWM cases, the modulating waveform has the amplitude of Mref and frequency is Fref but the carrier signal frequency Cfreq is chosen with respect to the slop of reference signal in respective band in HVFPD-PWM. In PD-PWM, a rectified sinusoidal reference wave and three triangular carrier signals (C1-C3), with same frequency and same amplitude are disposed so that the bands they occupy are contiguous as shown in Figure 2(a). In the case of HVFPD-PWM strategy, combination of rectified sinusoidal and trapezoidal reference wave is used and three triangular carrier signals (C1-C3) with same amplitude is used. The carrier signal frequency is based on the slop of modulating wave in each band as shown in Figure 2(b).

PD PWM AND HYBRID VFPD PWM STRATEGY
The initial driving pulses are obtained by comparing modulating wave with carrier signals. Thereafter, switching pulses of the switches are executed from proper combination of logical gates. From Figure 3. It is observed that the comparator outputs are represented by 1 to 3 . The switches S1 and S2  Figure 3 shows pulse generation circuit built with logical gates.

RESULTS AND DISCUSSION
This segment presents the simulation and experimental results for seven-level inverter [16] with PD-PWM and HVF-PWM. The simulation work has been done through the aid of MATLAB/Simulink. The experimental systems have been established to verify results with the aid of dSPACE RT110. The results present in the section are based on the parameters specified in Table 2.
The Figure 4(a) and Figure 4(b) depicts the feasibility of seven level output voltage waveform and corresponding % THD is 21.17 with modulation index of 0.9 using PD-PWM strategy using simulation results. Thus, the Figure 5(a) and Figure 5(b) shows resulting experimental seven level output voltage waveform and corresponding % THD is 21.3 respectively using PDPWM strategy. Moreover, the proposed HVFPD-PWM for seven level inverter is also confirmed with simulation and experimental results.   Table 4 it is noticed that RMS output voltage is higher in HVFPD-PWM strategy.

CONCLUSION
The operation of the asymmetric seven-level MLI has verified with two different PWM methods such as unipolar sine reference with phase disposition carriers PWM and proposed PWM. The proposed PWM has the hybrid unipolar reference (sinusoidal with trapezoidal) with variable frequency carriers. The performance of the asymmetric MLI has verified by using the simulation results and it has verified by the experimental results. The proposed PWM method has provided better results as compared with the convention PWM method in both simulation and experimental results. The comparison of simulation and experimental results has made to check the feasibility of the proposed PWM method. The proposed PWM provides the quality of output voltage with lower harmonic distortion and higher RMS voltage. From the results, it has evident that the total harmonic distortion for the proposed PWM method (16.95%) has significantly reduced as compared with the conventional PWM method (18.01%) at the modulation index of one.