Design and implementation of an optimized multilevel power inverter structure based on C MEX and PSPICE

Abstract

In this paper, both symmetric and asymmetric operations for an optimized cascaded multilevel power inverter (MLI) are thoroughly examined. While symmetric configurations are more suitable for AC drives due to their equal power sharing among the various levels, the asymmetric topologies fulfill the higher number of power source combinations under the same power semiconductor switch count. Additionally, particular attention was put on the design of this optimized topology in terms of both reliability and power efficiency by managing redundant states and minimizing the number of power switch commutations. Furthermore, a fundamental switching frequency modulation (FSFM) is thoroughly described in C MEX programming language and then the resulting gating signals are fed into the power circuit designed with PSPICE. By applying this co-simulation approach, the control design task is greatly simplified while achieving advanced analyses with more realistic electronic devices.