A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number of Switches with R and RL-Load

Lipika Nanda, Abhijit Dasgupta, Ullash Kumar Rout

Abstract


Multilevel inverter offers many benefits for high power application compavered to conventional cascaded Multilevel Inverter topology.This paper presents Symmetric CMLI using variable frequency carrier based pulse width modulation techniques. The proposed topology reduces total harmonic distortion and reduced switching losses for seven level inverter. The simulation study of the proposed topology has been carried out in MATLAB/SIMULINK. The main objective of this paper is to achieve number of levels of MLI with reduced number of switches and DC power sources compared to conventional topology.


Full Text:

PDF


DOI: http://doi.org/10.11591/ijpeds.v8.i1.pp40-50
Total views : 379 times

Refbacks

  • There are currently no refbacks.


Creative Commons License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.