Fault-tolerant single-input dual-output converter with preserved output under fault operation

ABSTRACT


INTRODUCTION
The DC-DC converters are the good choice for many portable applications.In the last decade, many topologies have been suggested in order to reduce the size, cost, control complexity and to improve the efficiency.Some popular converters capable of parallel operation of the loads among the existing literature [1]- [5] are based on the single inductor concept.
The current ripple-through inductor concept is used to analyze the converter, and the suggested method helps to predict the converter's steady state and dynamic performance [6].Further, this modeling approach is able to resolve the possible extension output range and issue of cross-regulation, which are significant in single-input multi-output (SIMO) converter design.An effective extension and supplement of the SIMO converter for simultaneous buck-boost and inverted outputs modeling and analysis are presented in [7] to deal with the unanticipated mathematical problems in the SIMO converter suggested in [6], single inductor SIMO converters are derived using computer-aided systematic derivation [8].It has a low part count and high-power density.A coupled inductor-based SIMO converter with lower output magnitudes is developed for integrated circuit power management [9].Nayak and Nat [10] introduced the comparative performance of SIDO buck converters, which helps to understand the various converters.The word in [11] a buck-boost mode SIMO converter is proposed with two different control strategies for buck/boost modes to handle the cross-regulation problem.It is used as the PWM modulator for buck mode operation to reduce the ISSN: 2088-8694  Fault-tolerant single-input dual-output converter with … (Botta Venkata Vara Lova Kala Bharathi) 2255 cross-regulation issues due to imperfect tracking of the inductor current.Another control strategy based on duty ratio and current predict control is suggested for the boost mode of operation.However, these methods are partially eliminated the cross-regulation issues and high control complexities for each mode of operation.Zhang et al. [12] proposed a SIMO converter with low hardware cost, less computational burden, and constant switching frequency as the objectives.This work suggests a deadbeat control to generate optimal duty ratios using online load current sensing.Many other SIMO topologies are proposed in [13]- [22] for various applications.Recently, a generalization procedure has been suggested in [13] for generating 4, 6, 8, and 12 outputs using a single voltage source and a single power semiconductor device without a transformer.The converters are combinations of SEPIC, boost, ćuk, and four-phase interleaved ćuk and SEPIC circuit configurations.A SIDO DC-DC buck converter configuration is designed in [14].It is helpful for bidirectional and unidirectional applications.It is developed with a reduced part count, better power loss sharing among the devices, and lower hardware cost.However, this topology has a control constraint that is one inductor must be charged before the other inductor (i.e., Vo1 > = Vo2).And, this approach influences the output voltages during the control of loads.An Integrated DC-DC converter with dual outputs configuration is suggested in [15].Furthermore, the synthesized topology of each node has emerged as buck voltage in addition to one boost voltage output.However, the control of this circuit is somewhat complex and is based on the timesharing concept while regulating the individual outputs.Hence the input source and components are underutilized.
Chen et al. [16] developed a circuit arrangement using a synchronous buck converter with multiple outputs for power supply of electrical vehicle.It has reduced the switching elements.However, the control methodology of the SIMO converter depends on a constraint such that the current through one inductor should be greater than another inductor (i.e., iL1> iL2).This control burden on the power converter has become a significant limitation in regulating the individual outputs of the SIMO converter.Super-lift LUO and buck converter are interfaced to develop the SIDO converter [17].It can generate both boost and buck output voltages.However, it has an operational constraint, d2<d1 limited the operating range of d1 when d2increased.The converter SIDO developed in [18] can generate SIDO and dual input-single output for various practical applications.However, the issues of cross-regulation and appropriate control action for mitigating them are not addressed in this work.Three-output single-input SIMO topology is designed in [19] with low voltage stress and high voltage gain without using coupled inductors and transformers.A three-level SIDO DC converter is developed in [20], capable of simultaneously regulating the boost and buck voltages.
A switched capacitor-based SIMO converter employing differential buck converters for achieving smaller volume and higher efficiency is designed in [21].This approach has better efficiency than conventional parallel connected buck-converters and switched capacitor-based multiple output converters.However, the circuit topology has more switched capacitors which create a sharp reduction in efficiency, and the operation of the converter requires a complex control strategy to minimize the cross-regulation issues.A SIMO converter with high gain DC output magnitudes using interleaved concept and SEPIC topology is proposed in [22] using coupled inductors and voltage multiplier technique.However, the developed converter in [22] has more numbers of devices and magnetic components in addition to high control complexity.A converter with multiple outputs for multiple loads based on interleaved with four phases is proposed in [23] for bipolar DC micro-grids.This interleaved multiphase converter is helpful for higher voltage and current applications.However, the circuit has more components, and its continuous conduction operation has a mathematical constraint on duty ratio while regulating the output voltage.A systematic approach to deriving switch fault-tolerant step-down dc-dc converter is presented in [24], [25].It is referred to open circuit switch fault due to power switch fault.
In this paper, the proposed SIDO topology can generate two different output voltages to regulate the different voltages levels.The major advantage of the topology is fault-tolerant on single and multiple switches, and loads are isolated during control, which leads to output voltages not being influenced by each other.The remaining parts of the paper are arranged as follows: proposed SIDO topology and operating modes are described in section 2. Semiconductor stress analysis, details of parameter design, analysis of power loss, fault-diagnostic methodology, and comparative assessment are dealt in section 3. Results and discussions are presented in section 4. Section 5 outlines the conclusions.

SIDO TOPOLOGY AND MODES OF OPERATION
The faulty tolerant SIDO configuration is introduced in this manuscript, shown in Figure 1.The components used in this topology: S1-S3 are power switches; the input source is the VDC; L1-C1 and L2-C2 are filter elements.R1 and R2 are loads, and D1-D3 are diodes.It develops two different output voltages, one is boosting voltage (V01) and the other one is buck-boost voltage (V02).More significantly, the proposed circuit The areas of application of this converter include DC nano-grids and solar battery chargers.Low outputs are essential in EVs' auxiliary power system application.Hence, this configuration is more suitable for getting low output (buck-boost) than the input voltage, and the remaining output (boost) is utilized in EV chargers.

Operating modes -Switching state 1:
The circuit model of the converter for the switching state 1 is is shown in Figure 2 From these modes of operation and their circuit models, it is observed that the loads are isolated from each other.Therefore, a change in one load will have no effect on the other load.Mainly, cross-regulation 2257 issues are removed, and the circuit model facilitates that the energy stored in one inductor is restricted Toone specific output.Therefore, the converter enables the independent operation and control of loads.

Operation of the redundant switches under fault-tolerant case
An undesired open circuit of the switch is considered as switch fault.In the proposed converter, different possible open circuit faults are presumed.The faults are isolated, and the converter is continued to supply power to the connected loads.In other words, even under switch fault conditions, the proposed configuration continue to operate as a SIDO converter, generating preserved output, i.e., boost and buckboost outputs.
In order to achieve the fault tolerance under switch faults, redundant switches of S4 and S5 are added to the designed SIDO converter, as shown in Figure 2(b).These features facilitate the converter to generate equal voltages during pre-and post-fault conditions.Different switch failure cases and the corresponding conducting switches are presented in Table 1 for preserved output voltages.

ANALYSIS OF STRESS, DESIGN OF PARAMETERS, FAULT DIAGNOSTIC METHODOLOGY, CALCULATION OF POWER LOSS, AND COMPARATIVE ASSESSMENT 3.1. Analysis of stress
The analysis of voltage stress [26] for the proposed converter is given in (2).The analysis for the current stress for the mode 1 is given in (3).For the mode 2, the current stress analysis is given in (4).(2) Where, VS1-5 and iS1-5 are the voltage and current stress of the switches (S1-S5), respectively.VD1-3 and iD1-3 are the voltage and current stress of the diodes (D1-D3), respectively.

Parameter design
The calculation of minimum inductance is presented in (5).The inductance ripple current is given in (6).The design of capacitance is given in (7).The design of the parameters for this converter is derived based on the literature [26].The specifications of the parameter are presented in Table 2.
Calculation of minimum inductance: where fs and dmin are switching frequency and minimum value duty ratio.RL1max and RL2max are the maximum resistances of load-1 and load-2, respectively.The inductor ripple current is (6).
Where dmax = maximum duty ratio, Vcpp = peak-to-peak ripple voltage, and rC is the ESR of the filter capacitor.

Fault-diagnostic and control methodology
The fault diagnosis and control flow chart are given in Figure 3. Here, the currents iL1, and iL2 are measured using the sensors and proceed for the fault diagnosis.If any absolute current value is zero, there is an open switch fault condition.The fault diagnosis is made by sensing the currents (iL1, iL2).Initially, the faults are labeled as F1 when S1 failed and similarly F2 for switch faults of S2 or S3.After fault diagnosis, the controls of power switches are done accordingly, as described in Table 1.

Calculation of losses
The power losses motioned in [27] determine the efficiency of converter operation.The power loss is presented in (8).The conduction loss (Pc) of IGBT is given in (9).The switching losses (Ps) are calculated using (10).The efficiency is obtained using (11).(11) Po is the converter output power.

Performance analysis and comparative assessment
Table 3 and Table 4 (see appendix) present the comparison of performance of the proposed converter and the SIMO topologies developed in the literature.At different duty ratio sets, the proposed structure is tested, and the corresponding plots are presented in Figure 4. From Figure 4(a) and Figure (b), it is noticed that, the proposed converter can generate different outputs voltage and outputs are independently regulate without duty cycle constraint.In addition, the output voltages are not affected regardless of the load variations.As a result, during the control of the converter the cross-regulation issue does not occur. Proposed ,

SIMULATIONRESULTS AND DISCUSSIONS 4.1. Simulation verification
The configuration proposed in this paper is tested in MATLAB/Simulink.Table 4 presents the details of the parameters.It is tested at an input voltage of 50 V (VDC), switching frequency is 50 kHz and the duty cycle is (50%).In the simulation, the converter is operated at healthy switches.The corresponding V01, iL1, V02 and iL2 are shown in Figures 5(a)-5(d) respectively.The V01 and V02 in Figure 5(a) and Figure 5(c) are similar to the theoretical results, i.e., (1).This converter is tested in transient case, i.e., changing in load, whose results are presented in Figure 6. Figure 6(a) and Figure 6(b) depicts the output voltages in the case of a sudden change in ±30% of the load.Figure 6 shows an excellent dynamic response in a load variation.The proposed configuration is tested in a switch fault (S1, S2, and S3).-Case 1: Fault tolerance during the main switch S1 failed This fault tolerance capability of the converter is described using the simulation results shown in Figure 7, Figure 8 and Figure 9.The Figure 7 shows the dual output voltages of the converter.The corresponding gate pulses during the healthy case (from t = 0 to 1 sec) and also in the case of S1 failed.Exactly at t = 1, the switch fault at S1 is initiated, and the control strategy is applied as described in Table 1.During the healthy condition, the main switches S1 and S2 are controlled, whereas the switches S2 and S3 are controlled during the switch fault at S1.It is observed that during this switch failure also, the converter has preserved output voltage.That means the magnitude of the output voltage, V01 is 100 V during healthy and post-fault conditions.Similarly, the magnitude of the output voltage at another load, V02, is also preserved at 50V at the set duty ratio of 0.5.
-Case 2: Fault tolerance during the main switch S2 failed Now fault at switch S2 is considered.The corresponding gate pulses and output voltages are shown in Figure 8.The control strategy to achieve the fault tolerance is described in Table 1and the implementation algorithm is presented in Figure 3.However, Figure 8 shows healthy operation till 1 second, and the fault is initiated at t = 1 sec.One may observe that there are no changes in the magnitudes of the output voltages during a post-fault condition.The multiple switch faults are a lesser chance in real-time operation.However, they are also considered to improve the continuity of operation of the converter.In the proposed converter, the possible multiple faults such as failure of S1 and S2 and also the failure of all main power switches S1, S2, and S3 are considered as shown in Figure 9.In this case till t = 1 sec, healthy condition, multiple failures of switches (S1, S2) are initiated at t = 1 sec and failure of all the main switches (S1, S2, S3) is initiated at t = 2 sec.The control operation for fault tolerance is followed as shown in Table 1.The proposed converter efficiency, power loss distribution losses of the power devices in healthy and fault cases are illustrated in Figures 10(a

CONCLUSION
The proposed SIDO converter is analyzed in this paper.The highlight of this configuration is that it is free from any assumption on operating duty cycle (d1>d2 or d1=d2 or d1<d2) and inductor charging currents (iL1> iL2> or iL1< iL2).The proposed configuration's working principle and operating modes are also described in detail in this paper.Its ability to generate different output voltages without stated assumptions has been well established with simulation verifications.The illustrated results, such as output voltages not getting influenced by the variation of inductor current and load current, supported the claim to eliminate the crossregulation problem.More significantly, it has switch fault-tolerant capability under single and multiple switch failures.The proposed fault-diagnostic methodology is verified and validated with simulation results.

Figure 3 .
Figure 3. Flow chat for switch fault detection and control

Figure 4 .
Figure 4. Variation of output voltage: (a) output voltage vs. duty cycle, and (b) load current vs. load

Table 1 .
Control of the switches under switch fault condition

Table 3 .
Proposed converter comparison with the different SIMO topologies

Table 4 .
Performance comparison of different SIMO topologies