Design and performance analysis of asymmetric multilevel inverter with reduced switches based on SPWM

Layth S. Salman, Harith Al-Badrani

Abstract


Multilevel inverters have the benefit of producing high output voltage values with little distortion. This paper deals with decreasing total harmonic distortion (THD) and providing an output voltage with various step levels switching devices. In this study, a 27-level inverter with three asymmetric H-Bridge was designed and simulated based on level shift sinusoidal pulse-width modulation and phase shift sinusoidal pulse-width modulation methods. MATLAB/Simulink has been used to create this model and test it at different types of loads. The results showed that a multilevel inverter with (PS-PWM) produces less (THD) than a multilevel with (LS-PWM), when the resistive load was used, the produced voltage and current THD in (PS-PWM) and (LS-PWM) are 3.02% and 4.30% respectively, that has resulted from the linearity between voltage and current in the resistive load. While in the case of applying an inductive load, the THD in the voltage is constant in both (PS-PWM) and (LS-PWM) methods and has the same values as the THD in a resistive load. However, the THD in the current with inductive load decreased to 2.79% in (PS-PWM) and 4.04% in (LS-PWM). Finally, these results show that the performance of the proposed power circuit with PS-PWM is better than (LS-PWM).

Keywords


Asymmetric DC sources; Cascade H Bridge; Multilevel inverter; Sinusoidal pulse width modulation; Total harmonic distortion

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DOI: http://doi.org/10.11591/ijpeds.v14.i1.pp320-326

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