DSP implementation and discretization of phase locked loop methods in presence of grid imperfections

Abstract

The fluctuation of grid variables affects the performance of the phase-locked loop, considerably reducing the efficiency of grid energy injection or compensation currents generation during active filtering. The phase locked loop is the main tool for grid synchronization, offering continuous, real-time extraction of grid variables. As these techniques are implemented on digital computers, their discretization and analysis of resource requirements is an important step. This work represents a discretization and implementation on a digital signal processing (DSP) board of two distinct phase-locked loop (PLL) techniques as well as a comparative study of the latter. Our study covers various aspects, including the discretization of the PLLs to be studied, an assessment of the hardware resources required, their implementation on a DSP board, and their effectiveness in quickly identifying grid variables in the presence of imbalance and harmonics, which represent the most frequent grid imperfections.