Digitally fast synchronization of single-phase grid-tied inverter using FPGA

Afarulrazi Abu Bakar, Balarajan Sannasy, Hazwaj Mhd Poad, Tharnisha Sithananthan, Wahyu Mulyo Utomo, Nor Farisha Diana Rosli

Abstract


As interest in alternative energy sources grows, grid-connected inverters are getting more advanced. Thus, to synchronize the output waveform of an inverter with the grid supply system, the frequency and phase angle ought to be consistent. This paper presents an enhanced digital implementation controller for a grid-connected inverter using the sinusoidal pulse-width modulation (SPWM) switching technique via an appropriately designed low-pass filter. The main contribution of the proposed digital controller algorithm is to synchronize with the grid for the next half-cycle. The proposed control technique used the integrated response from the zero-crossing detector (ZCD) circuit for every half-cycle to trigger the digital phase-locked loop (PLL) implemented using field-programmable gate array (FPGA). An experimental 100 W single-phase full-bridge inverter prototype tested and validated the proposed control algorithm to prove the switching approach works. From the experimental results, the proposed control algorithm demonstrates synchronization with the grid voltage within 8 ms during startup. Furthermore, it exhibits the ability to adapt to phase changes when subjected to a distorted grid, achieving synchronization within 42 ms. This research also emphasizes synchronization between the grid waveform and the inverter output via the phase angle difference.

Keywords


Digital PLL; digital switching; grid synchronization; unipolar SPWM; ZCD component

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DOI: http://doi.org/10.11591/ijpeds.v15.i4.pp2452-2461

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