Performance Analysis of FPGA based Diode Clamped Multilevel Inverter Fed Induction Motor Drive using Phase Opposition Disposition Multicarrier Based Modulation Strategy

Nunsavath Susheela, Satish Kumar

Abstract


Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter.  This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load.  Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.


Full Text:

PDF


DOI: http://doi.org/10.11591/ijpeds.v8.i4.pp1512-1523

Refbacks

  • There are currently no refbacks.


Copyright (c) 2017 Nunsavath Susheela, Satish Kumar

Creative Commons License

This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.