Multi-carrier PWM techniques to assess the performance of a 5-level diode clamped multilevel inverter fed PMSM drive

Abstract

The advantages of multilevel inverters (MLIs) have led to their increased use in high- and medium-voltage power applications. These inverters reduce harmonic content, common-mode voltage, dv/dt stress on switches, and electromagnetic interference, among other things. In recent decades, drives for permanent magnet synchronous machines (PMSMs) that rely on inverters have become increasingly popular in both commercial and residential settings due to their great performance. Phase disposition (PD), phase opposition disposition (POD), and alternate phase opposition disposition (APOD) are three multi-carrier pulse width modulation (MCPWM) approaches that were simulated in this work to explore a 5-level DCMLI-fed PMSM. In order to create control pulses, each method compares reference signals with carrier signals that are either triangular or trapezoidal. Detailed comparisons with conventional three-level voltage source inverters (VSIs) are made based on the results. A 63.21 percent improvement in the total harmonic distortion (THD) of the output voltage and a 26.52% improvement in the THD of the stator current are both supported by experimental evidence.