Real-time selective harmonic elimination in multilevel inverters using embedded metaheuristic optimization on PYNQ-Z2

Abstract

This paper offers a structured methodology for regulating optimal control switching angles in multilevel inverters to achieve selective harmonic elimination (SHE) using embedded optimization algorithms on the PYNQ‑Z2 FPGA operating base. The proposed approach employs metaheuristic techniques including particle swarm optimization (PSO), genetic algorithm (GA), gray wolf optimization (GWO), slime mould algorithm (SMA), and whale optimization algorithm (WOA) to generate candidate switching angles across a wide range of modulation indices. For each modulation index, the most effective solution towards harmonic reduction and waveform quality is selected and implemented on the FPGA controller, enabling reliable real‑time operation with very low delay. Experimental validation of a 31‑level single‑phase inverter confirms the effectiveness of the method in eliminating selected harmonics and refining the fundamental output. Combining comparative algorithmic selection with FPGA‑based control demonstrates a systematic and efficient strategy for advanced inverter systems. A MATLAB/Simulink model is constructed to represent the 31-level inverter to enhance the practical aspect and study the frequency spectrum, where many harmonics that contribute to obtaining THD within the IEEE standards are eliminated. Also, the different types of losses are calculated based on the governing mathematical rates.