FPGA-based hardware-defined phase generation for capacitor-less permanent split capacitor motor operation

Abstract

Permanent split capacitor (PSC) motors are widely used due to their simple structure and reliability; however, conventional operation depends on a fixed passive capacitor to generate phase displacement between the main and auxiliary windings, limiting controllability and adaptability. This paper proposes an FPGA-based hardware-defined phase generation architecture for capacitor-less PSC motor operation, where the capacitor phase function is replaced by digitally synthesized phase-displaced excitation signals. The proposed system was implemented on a Tang Nano 4K FPGA using multi-channel PWM generation with hardware-based dead-time protection. Experimental validation was performed on a capacitor-less PSC motor using programmable phase relationships of 60°, 90°, and 120° over excitation frequencies of 20-50 Hz. The measured main and auxiliary winding currents were analyzed to evaluate the effectiveness of the electronically synthesized phase displacement and to reconstruct the resultant rotating magnetic field. Quantitative evaluation using circularity index (CI) and ellipticity ratio (ER) showed that the 90° excitation condition produced the most balanced magnetic field trajectory among the tested configurations. The results demonstrate that FPGA-based hardware-defined phase generation provides a flexible, deterministic, and experimentally validated alternative to conventional capacitor-based PSC motor operation, while future work will focus on closed-loop optimization and efficiency-torque evaluation.